| 2012 | ||
|---|---|---|
| j3 | Thomas Rabenalt, Michael Richter, Frank Poehl, Michael Gössel: Highly Efficient Test Response Compaction Using a Hierarchical X-Masking Technique. IEEE Trans. on CAD of Integrated Circuits and Systems 31(6): 950-957 (2012) | |
| 2010 | ||
| c5 | Frank Poehl, Frank Demmerle, Juergen Alt, Hermann Obermeir: Production test challenges for highly integrated mobile phone SOCs - A case study. European Test Symposium 2010: 17-22 | |
| 2007 | ||
| j2 | Frank Poehl, Matthias Beck, Ralf Arnold, Jan Rzeha, Thomas Rabenalt, Michael Gössel: On-chip evaluation, compensation and storage of scan diagnosis data. IET Computers & Digital Techniques 1(3): 207-212 (2007) | |
| i1 | Matthias Beck, Olivier Barondeau, Martin Kaibel, Frank Poehl, Xijiang Lin, Ron Press: Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality. CoRR abs/0710.4763 (2007) | |
| 2006 | ||
| c4 | Frank Poehl, Jan Rzeha, Matthias Beck, Michael Gössel, Ralf Arnold, Peter Ossimitz: On-Chip Evaluation, Compensation, and Storage of Scan Diagnosis Data - A Test Time Efficient Scan Diagnosis Architecture. European Test Symposium 2006: 239-246 | |
| 2005 | ||
| c3 | Matthias Beck, Olivier Barondeau, Martin Kaibel, Frank Poehl, Xijiang Lin, Ron Press: Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality. DATE 2005: 56-61 | |
| c2 | Matthias Beck, Olivier Barondeau, Frank Poehl, Xijiang Lin, Ron Press: Measures to Improve Delay Fault Testing on Low-Cost Testers - A Case Study. VTS 2005: 223-228 | |
| 2003 | ||
| c1 | Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muhmenthaler, Nagesh Tamarapalli, Mark Kassab, Nilanjan Mukherjee, Janusz Rajski: Industrial Experience with Adoption of EDT for Low-Cost Test without Concessions. ITC 2003: 1211-1220 | |
| 1999 | ||
| j1 | Frank Poehl, Walter Anheier: Quality Determination for Gate Delay Fault Tests Considering Three-State Elements. J. Electronic Testing 14(1-2): 49-55 (1999) | |
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