Bernard Pottier

Adnan Iqbal, Bernard Pottier: Meta-simulation of large WSN on multi-core computers. SpringSim 2010: 133

Samar Yazdani, Joel Cambonie, Bernard Pottier: Coordinated concurrent memory accesses on a reconfigurable multimedia accelerator. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 13-23 (2009)

Hritam Dutta, Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich, Bernard Pottier: A holistic approach for tightly coupled reconfigurable parallel processors. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 53-62 (2009)

Loïc Lagadec, Bernard Pottier, Damien Picard: Toolset for nano-reconfigurable computing. Microelectronics Journal 40(4-5): 665-672 (2009)

Toomas P. Plaks, Neil Bergmann, Bernard Pottier: Guest editorial CAPA'08 configurable computing: Configuring algorithms, processes, and architecture issue I: Configuring algorithms and processes. ACM Trans. Embedded Comput. Syst. 9(1) (2009)

Toomas P. Plaks, Neil Bergmann, Bernard Pottier: Guest editorial CAPA'08 Configurable computing: Configuring algorithms, processes, and architecture Issue II: Configuring hardware architecture. ACM Trans. Embedded Comput. Syst. 9(2) (2009)

Samar Yazdani, Thierry Goubier, Bernard Pottier, Catherine Dezan: Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. ARC 2009: 287-292

Muhammad Rashid, Bernard Pottier: Application Capturing and Performance Estimation in an Holistic Design Environment. ECBS 2009: 21-30

Samer Damaj, Thierry Goubier, Frédéric Blanc, Bernard Pottier: A Heuristic (delta, D) Digraph to Interpolate between Hypercube and de Bruijn Topologies for Future On-Chip Interconnection Networks. ICPP Workshops 2009: 492-498

Samar Yazdani, Joel Cambonie, Bernard Pottier: Programming Reconfigurable Decoupled Application Control Accelerator For Mobile Systems. ARC 2008: 15-26

Muhammad Rashid, Damien Picard, Bernard Pottier: Application Analysis for Parallel Processing. DSD 2008: 633-640

Bernard Pottier: FPGAs or Distributed Systems? ERSA 2008: 67-75

Samar Yazdani, Joel Cambonie, Bernard Pottier: Reconfiguralbe multimedia accelerator for mobile systems. SoCC 2008: 287-290

Bernard Pottier: An Integrated Platform for Heterogeneous Reconfigurable Computing. ERSA 2007: 25-36

Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier: Massively Parallel Processor Architectures: A Co-design Approach. ReCoSoC 2007: 61-68

Samar Yazdani, Joel Cambonie, Bernard Pottier: Coordinated concurrent memory accesses on a reconfigurable multimedia processor. ReCoSoC 2007: 76-83

Catherine Dezan, Erwan Fabiani, Christophe Gouyen, Loïc Lagadec, Bernard Pottier, Caaliph Andriamisaina, Alix Poungou: Synthèse portable pour micro-architectures à grain fin. Application aux turbo décodeurs et nanofabriques. Technique et Science Informatiques 25(7): 893-920 (2006)

Catherine Dezan, Christophe Jégo, Bernard Pottier, Christophe Gouyen, Loïc Lagadec: The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. HICSS 2006

Caaliph Andriamisaina, Catherine Dezan, Christophe Jégo, Bernard Pottier: Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit. ERSA 2005: 263-266

Christophe Gouyen, Loïc Lagadec, Bernard Pottier, A. André, E. Lepicier, François Dupont: Compiler level integration of a portable CAD framework for reconfigurable circuits. ReCoSoC 2005: 19-26

Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys: Co-Design of Massively Parallel Embedded Processor Architectures. ReCoSoC 2005: 27-34

Erwan Fabiani, Christophe Gouyen, Bernard Pottier: Intermediate Level Components for Reconfigurable Platforms. SAMOS 2004: 59-68

Joel Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani: Compiler and System Techniques for soc Distributed Reconfigurable Accelerators. SAMOS 2004: 293-302

Loïc Lagadec, Bernard Pottier, Oscar Villellas, Erwan Fabiani, Catherine Dezan: A LUT based Approach for High Level Synthesis on FPGAs. IWLS 2002: 167-172

Loïc Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier: Placing, Routing, and Editing Virtual FPGAs. FPL 2001: 357-366

Catherine Dezan, Loïc Lagadec, Bernard Pottier: Object Oriented Approach for Modeling Digital Circuits. MSE 1999: 51-52

Loïc Lagadec, Bernard Pottier: A 6200 Model and Editor Based on Object Technology. FPL 1998: 515-519

Joël Champeau, Luc Le Pape, Bernard Pottier, Stéphane Rubini, Eric Gautrin, Laurent Perraudeau: Flexible Parallel FPGA-Based Architectures with ArMe. HICSS (1) 1994: 105-113

L. Lemarchand, A. Plantec, Bernard Pottier, S. Zanati: An object-oriented environment for specification and concurrent execution of genetic algorithms. OOPS Messenger 4(2): 163-165 (1993)

K. Bouazza, Joël Champeau, P. Ng, Bernard Pottier, Stéphane Rubini: Implementing cellular automata on the ArMen machine. Algorithms and Parallel VLSI Architectures 1991: 317-324

Jean Marie Filloque, Eric Gautrin, Bernard Pottier: Efficient Global Computations on a Processor Network with Programmable Logic. PARLE (1) 1991: 69-82