| 2008 | ||
|---|---|---|
| c11 | Purnamrita Sarkar, Andrew W. Moore, Amit Prakash: Fast incremental proximity search in large graphs. ICML 2008: 896-903 | |
| r2 | ||
| r1 | ||
| 2007 | ||
| j2 | Amit Prakash, Rahul De': Importance of development context in ICT4D projects: A study of computerization of land records in India. IT & People 20(3): 262-281 (2007) | |
| c10 | Amit Prakash, Rahul De': Enactment of Technology Structures in ICT4D Projects : A Study of Computerization of Land Records in India. PACIS 2007: 94 | |
| 2006 | ||
| c9 | Xiang Wu, Amit Prakash, Marghoob Mohiyuddin, Adnan Aziz: Scheduling Traffic Matrices On General Switch Fabrics. Hot Interconnects 2006: 87-92 | |
| c8 | Matthew Richardson, Amit Prakash, Eric Brill: Beyond PageRank: machine learning for static ranking. WWW 2006: 707-715 | |
| 2004 | ||
| c7 | Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Wayne Wolf: Synthesizing interconnect-efficient low density parity check codes. DAC 2004: 488-491 | |
| c6 | Amit Prakash, Adnan Aziz, Vijaya Ramachandran: Randomized Parallel Schedulers for Switch-Memory-Switch Routers: Analysis and Numerical Studies. INFOCOM 2004 | |
| 2003 | ||
| j1 | Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz: A high-performance architecture and BDD-based synthesis methodology for packet classification. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 698-709 (2003) | |
| c5 | Adnan Aziz, Amit Prakash, Vijaya Ramachandran: A near optimal scheduler for switch-memory-switch routers. SPAA 2003: 343-352 | |
| 2002 | ||
| c4 | Amit Prakash, Adnan Aziz: A Middle Ground between CAMs and DAGs for High-Speed Packet Classification. Hot Interconnects 2002: 89-94 | |
| c3 | Manish Arora, Nitin Lahane, Amit Prakash: All assembly implementation of G.729 Annex B speech codec on a fixed point DSP. ICASSP 2002: 3780-3783 | |
| c2 | Sadia Sharif, Adnan Aziz, Amit Prakash: An O(log2N) parallel algorithm for output queuing. INFOCOM 2002 | |
| c1 | Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz: A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet Classification. IWLS 2002: 97-102 | |
Colors in the list of coauthors
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