P. W. Chandana Prasad

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	2012
c9		Azam Beg, P. W. Chandana Prasad, Ashutosh Kumar Singh, S. M. N. Arosha Senanayake: A neural model for processor-throughput using hardware parameters and software's dynamic behavior. ISDA 2012: 821-825
	2010
j5		Azam Beg, P. W. Chandana Prasad: Prediction of area and length complexity measures for binary decision diagrams. Expert Syst. Appl. 37(4): 2864-2873 (2010)
	2009
j4		P. W. Chandana Prasad, Azam Beg: Investigating data preprocessing methods for circuit complexity models. Expert Syst. Appl. 36(1): 519-526 (2009)
	2008
j3		Azam Beg, P. W. Chandana Prasad, Ajmal Beg: Applicability of feed-forward and recurrent neural networks to Boolean function complexity modeling. Expert Syst. Appl. 34(4): 2436-2443 (2008)
c8		Azam Beg, P. W. Chandana Prasad, Walid Ibrahim, Emad Abu Shama: Utilizing synthesis to verify Boolean function models. ISCAS 2008: 1576-1579
	2007
j2		P. W. Chandana Prasad, Ali Assi, Azam Beg: Binary Decision Diagrams and neural networks. The Journal of Supercomputing 39(3): 301-320 (2007)
	2006
j1		Mohamed Raseen, P. W. Chandana Prasad, Ali Assi: An efficient estimation of the ROBDD's complexity. Integration 39(3): 211-228 (2006)
c7		P. W. Chandana Prasad, Bruce Mills, Ali Assi, S. M. N. Arosha Senanayake, V. C. Prasad: Evaluation time Estimation for Pass Transistor Logic circuits. DELTA 2006: 422-428
c6		Bruce Mills, P. W. Chandana Prasad, Ali Assi: Formal Presentation of Two Initial Variable Ordering Algorithms for Binary Decision Diagrams. MSV 2006: 256-262
	2004
c5		P. W. Chandana Prasad, Ali Assi, Mohamed Raseen: BDD Minimization Using Graph Parameter Permutation. ESA/VLSI 2004: 491-496
c4		Mohamed Raseen, Ali Assi, P. W. Chandana Prasad, A. Harb: Effect of Boolean Min-terms on the Complexity of ROBDDs. International Conference on Computational Intelligence 2004: 454-457
c3		P. W. Chandana Prasad, Ali Assi, Mohamed Raseen, A. Harb: BDD Based Method for Fast Equivalence Checking. International Conference on Computational Intelligence 2004: 474-477
	2003
c2		P. W. Chandana Prasad, M. Maria Dominic, Ashutosh Kumar Singh: Improved Variable Ordering for ROBDDs. ICADL 2003: 544-547
c1		P. W. Chandana Prasad, M. Maria Dominic, Ashutosh Kumar Singh: Variable Order Verification Use of Logic Representation. ICADL 2003: 689

Coauthor Index

1	Ali Assi	[j2] [j1] [c7] [c6] [c5] [c4] [c3]
2	Ajmal Beg	[j3]
3	Azam Beg	[c9] [j5] [j4] [j3] [c8] [j2]
4	M. Maria Dominic	[c2] [c1]
5	A. Harb	[c4] [c3]
6	Walid Ibrahim	[c8]
7	Bruce Mills	[c7] [c6]
8	V. C. Prasad	[c7]
9	Mohamed Raseen	[j1] [c5] [c4] [c3]
10	S. M. N. Arosha Senanayake	[c9] [c7]
11	Emad Abu Shama	[c8]
12	Ashutosh Kumar Singh	[c9] [c2] [c1]

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