Thomas Preußer
List of publications from the DBLP Bibliography Server - FAQ| 2012 | ||
|---|---|---|
| c21 | Thomas B. Preußer, Oliver Knodel, Rainer G. Spallek: Short-Read Mapping by a Systolic Custom FPGA Computation. FCCM 2012: 169-176 | |
| c20 | Martin Zabel, Thomas B. Preußer, Rainer G. Spallek: Increasing the efficiency of an embedded multi-core bytecode processor using an object cache. JTRES 2012: 88-97 | |
| 2011 | ||
| c19 | Thomas B. Preußer, Martin Zabel, Rainer G. Spallek: Accelerating Computations on FPGA Carry Chains by Operand Compaction. IEEE Symposium on Computer Arithmetic 2011: 95-102 | |
| c18 | Oliver Knodel, Thomas B. Preußer, Rainer G. Spallek: Next-generation massively parallel short-read mapping on FPGAs. ASAP 2011: 195-201 | |
| c17 | Hong Diep Nguyen, Bogdan Pasca, Thomas B. Preußer: FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. FPL 2011: 232-237 | |
| c16 | Marco Kaufmann, Matthias Häsing, Thomas Preußer, Rainer G. Spallek: The Java Virtual Machine in retargetable, high-performance instruction set simulation. PPPJ 2011: 21-30 | |
| 2010 | ||
| c15 | Thomas B. Preußer, Peter Reichel, Rainer G. Spallek: An Embedded GC Module with Support for Multiple Mutators and Weak References. ARCS 2010: 25-36 | |
| c14 | Thomas B. Preußer, Rainer G. Spallek: Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains. FPL 2010: 318-325 | |
| c13 | Michael Dittrich, Thomas B. Preußer, Rainer G. Spallek: Solving Sudokus through an incidence matrix on an FPGA. FPT 2010: 465-469 | |
| c12 | Martin Schoeberl, Thomas B. Preußer, Sascha Uhrig: The embedded Java benchmark suite JemBench. JTRES 2010: 120-127 | |
| 2009 | ||
| c11 | Thomas B. Preußer, Rainer G. Spallek: Mapping basic prefix computations to fast carry-chain structures. FPL 2009: 604-608 | |
| c10 | Martin Zabel, Thomas B. Preußer, Rainer G. Spallek: High-Level Architecture Modelling Assisting the Processor Platform Development, Debugging and Simulation. MBMV 2009: 187-196 | |
| 2008 | ||
| c9 | Thomas Preußer, Rainer G. Spallek: Java-Programmed Bootloading in Spite of Load-Time Code Patching on a Minimal Embedded Bytecode Processor. ESA 2008: 260-264 | |
| 2007 | ||
| c8 | Martin Zabel, Thomas B. Preußer, Peter Reichel, Rainer G. Spallek: Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture. DSD 2007: 59-62 | |
| c7 | Thomas Preußer, Martin Zabel, Rainer G. Spallek: Enabling constant-time interface method dispatch in embedded Java processors. JTRES 2007: 196-205 | |
| c6 | Thomas Preußer, Martin Zabel, Rainer G. Spallek: Bump-pointer method caching for embedded Java processors. JTRES 2007: 206-210 | |
| 2006 | ||
| c5 | Thomas B. Preußer, Rainer G. Spallek: Analysis of a Fully-Scalable Digital Fractional Clock Divider. ASAP 2006: 173-177 | |
| 2005 | ||
| c4 | Martin Zabel, Steffen Köhler, Martin Zimmerling, Thomas B. Preußer, Rainer G. Spallek: Design space exploration of coarse-grain reconfigurable DSPs. ReConFig 2005 | |
| 2004 | ||
| c3 | Thomas Preußer, Steffen Köhler, Rainer G. Spallek: RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing. ESA/VLSI 2004: 130-135 | |
| c2 | Steffen Köhler, Jens Braunes, Thomas Preußer, Martin Zabel, Rainer G. Spallek: Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration. FPL 2004: 781-790 | |
| 1998 | ||
| c1 | Thomas Preußer: Prüfsystem VINSPEC für die automatische Qualitätssortierung von Autospiegeln. DAGM-Symposium 1998: 463-470 | |
Colors in the list of coauthors
Last update Fri May 24 11:04:52 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page