| 2012 | ||
|---|---|---|
| j8 | Ioannis Doudalis, James A. Clause, Guru Venkataramani, Milos Prvulovic, Alessandro Orso: Effective and Efficient Memory Protection Using Dynamic Tainting. IEEE Trans. Computers 61(1): 87-100 (2012) | |
| c26 | Ioannis Doudalis, Milos Prvulovic: Euripus: A flexible unified hardware memory checkpointing accelerator for bidirectional-debugging and reliability. ISCA 2012: 261-272 | |
| 2011 | ||
| j7 | Guru Venkataramani, Christopher J. Hughes, Sanjeev Kumar, Milos Prvulovic: DeFT: Design space exploration for on-the-fly detection of coherence misses. TACO 8(2): 8 (2011) | |
| c25 | Siddhartha Chhabra, Brian Rogers, Yan Solihin, Milos Prvulovic: SecureME: a hardware-software approach to full system security. ICS 2011: 108-119 | |
| c24 | Jungju Oh, Christopher J. Hughes, Guru Venkataramani, Milos Prvulovic: LIME: a framework for debugging load imbalance in multi-threaded execution. ICSE 2011: 201-210 | |
| c23 | Jungju Oh, Milos Prvulovic, Alenka G. Zajic: TLSync: support for multiple fast barriers using on-chip transmission lines. ISCA 2011: 105-116 | |
| e1 | Carlo Galuzzi, Luigi Carro, Andreas Moshovos, Milos Prvulovic (Eds.): 44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, 3-7 December 2011, Porto Alegre, Brazil. ACM 2011, isbn 978-1-4503-1053-6 | |
| 2010 | ||
| c22 | ||
| 2009 | ||
| j6 | Josep Torrellas, Luis Ceze, James Tuck, Calin Cascaval, Pablo Montesinos, Wonsun Ahn, Milos Prvulovic: The Bulk Multicore architecture for improved programmability. Commun. ACM 52(12): 58-65 (2009) | |
| j5 | Siddhartha Chhabra, Brian Rogers, Yan Solihin, Milos Prvulovic: Making secure processors OS- and performance-friendly. TACO 5(4) (2009) | |
| j4 | Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic: MemTracker: An accelerator for memory debugging and monitoring. TACO 6(2) (2009) | |
| 2008 | ||
| c21 | Samantika Subramaniam, Milos Prvulovic, Gabriel H. Loh: PEEP: Exploiting predictability of memory dependences in SMT processors. HPCA 2008: 137-148 | |
| c20 | Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin: Single-level integrity and confidentiality protection for distributed shared memory multiprocessors. HPCA 2008: 161-172 | |
| c19 | Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic: FlexiTaint: A programmable accelerator for dynamic taint propagation. HPCA 2008: 173-184 | |
| 2007 | ||
| c18 | Guru Venkataramani, Brandyn Roemer, Yan Solihin, Milos Prvulovic: MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging. HPCA 2007: 273-284 | |
| c17 | James A. Clause, Ioannis Doudalis, Alessandro Orso, Milos Prvulovic: Effective memory protection using dynamic tainting. ASE 2007: 284-292 | |
| c16 | Brian Rogers, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin: Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly. MICRO 2007: 183-196 | |
| 2006 | ||
| j3 | Rithin Shetty, Mazen Kharbutli, Yan Solihin, Milos Prvulovic: HeapMon: A helper-thread approach to programmable, automatic, and low-overhead memory bug detection. IBM Journal of Research and Development 50(2-3): 261-276 (2006) | |
| c15 | Brian Rogers, Milos Prvulovic, Yan Solihin: Efficient data protection for distributed shared memory multiprocessors. PACT 2006: 84-94 | |
| c14 | Jianli Shen, Guru Venkataramani, Milos Prvulovic: Tradeoffs in fine-grained heap memory protection. ASID 2006: 52-57 | |
| c13 | Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru Venkataramani, Milos Prvulovic: Comprehensively and efficiently protecting the heap. ASPLOS 2006: 207-218 | |
| c12 | Milos Prvulovic: CORD: cost-effective (and nearly overhead-free) order-recording and data race detection. HPCA 2006: 232-243 | |
| c11 | Chenyu Yan, Daniel Englender, Milos Prvulovic, Brian Rogers, Yan Solihin: Improving Cost, Performance, and Security of Memory Encryption and Authentication. ISCA 2006: 179-190 | |
| 2005 | ||
| j2 | Brian Rogers, Yan Solihin, Milos Prvulovic: Memory predecryption: hiding the latency overhead of memory encryption. SIGARCH Computer Architecture News 33(1): 27-33 (2005) | |
| j1 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. TACO 2(3): 247-279 (2005) | |
| c10 | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, Milos Prvulovic: Synonymous address compaction for energy reduction in data TLB. ISLPED 2005: 357-362 | |
| 2003 | ||
| c9 | María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas: Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. IEEE PACT 2003: 170-181 | |
| c8 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. HPCA 2003: 191-202 | |
| c7 | Milos Prvulovic, Josep Torrellas: ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes. ISCA 2003: 110-121 | |
| 2002 | ||
| c6 | Francis H. Dang, María Jesús Garzarán, Milos Prvulovic, Ye Zhang, Alin Jula, Hao Yu, Nancy M. Amato, Lawrence Rauchwerger, Josep Torrellas: SmartApps: An Application Centric Approach to High Performance Computing: Compiler-Assisted Software and Hardware Support for Reduction Operations. IPDPS 2002 | |
| c5 | Milos Prvulovic, Josep Torrellas, Zheng Zhang: ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors. ISCA 2002: 111-122 | |
| c4 | José F. Martínez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas: Cherry: checkpointed early resource recycling in out-of-order microprocessors. MICRO 2002: 3-14 | |
| 2001 | ||
| c3 | María Jesús Garzarán, Milos Prvulovic, Ye Zhang, Josep Torrellas, Alin Jula, Hao Yu, Lawrence Rauchwerger: Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors. IEEE PACT 2001: 243-254 | |
| c2 | Sumit Roy, Raj Kumar, Milos Prvulovic: Improving System Performance with Compressed Memory. IPDPS 2001: 66 | |
| c1 | Milos Prvulovic, María Jesús Garzarán, Lawrence Rauchwerger, Josep Torrellas: Removing architectural bottlenecks to the scalability of speculative parallelization. ISCA 2001: 204-215 | |
Colors in the list of coauthors
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