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Logan M. Rakai
2010 – today
- 2013
[c7]Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick: A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications. ACM Great Lakes Symposium on VLSI 2013: 305-310- [c6]Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick: Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. ISPD 2013: 154-161
- 2012
- [j4]Logan M. Rakai, Laleh Behjat, Sebastian Martin, Jose Aguado: An algebraic multigrid-based algorithm for circuit clustering. Applied Mathematics and Computation 218(9): 5202-5216 (2012)
- [j3]Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick: A New Length-Based Algebraic Multigrid Clustering Algorithm. VLSI Design 2012 (2012)
- [c5]
- 2011
- [j2]Amin Farshidi, Laleh Behjat, Logan M. Rakai, Bahareh Fathi: A pre-placement individual net length estimation model and an application for modern circuits. Integration 44(2): 111-122 (2011)
- [c4]Yang-Yang Li, Logan M. Rakai, Laleh Behjat, Bill Swartz: Wirelength and congestion estimation for routability-driven placement. SLIP 2011: 1
2000 – 2009
- 2009
- [j1]Logan M. Rakai, Laleh Behjat, Shawki Areibi, Tamás Terlaky: A Multilevel Congestion-Based Global Router. VLSI Design 2009 (2009)
- [c3]Bahareh Fathi, Laleh Behjat, Logan M. Rakai: A pre-placement net length estimation technique for mixed-size circuits. SLIP 2009: 45-52
- 2007
- [c2]Laleh Behjat, Jianhua Li, Logan M. Rakai, Jie Huang: Two Clustering Preprocessing Techniques for Large-Scale Circuits. ISCAS 2007: 1057-1060
- 2006
- [c1]Logan M. Rakai, Jianhua Li, Laleh Behjat, Jie Huang: A Structural Study and Hyperedge Clustering Technique for Large Scale Circuits. SiPS 2006: 66-70
Coauthor Index
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last updated on 2013-06-04 22:21 CEST by the dblp team