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Tanausú Ramírez
2010 – today
- 2013
[c8]Javier Carretero, Enric Herrero, Matteo Monchiero, Tanausú Ramírez, Xavier Vera: Capturing vulnerability variations for register files. DATE 2013: 1468-1473- 2011
- [c7]Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González: Hardware/software-based diagnosis of load-store queues using expandable activity logs. HPCA 2011: 321-331
- [c6]Nivard Aymerich, A. Asenov, A. Brown, Ramon Canal, B. Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, I. Vatajelu, Xavier Vera, X. Wang, Paul Zuber: New reliability mechanisms in memory design for sub-22nm technologies. IOLTS 2011: 111-114
- 2010
- [c5]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Onur Mutlu, Mateo Valero: Efficient runahead threads. PACT 2010: 443-452
2000 – 2009
- 2009
- [c4]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero: Code Semantic-Aware Runahead Threads. ICPP 2009: 437-444
- 2008
- [c3]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero: Runahead Threads to improve SMT performance. HPCA 2008: 149-158
- 2007
- [j2]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero: Energy saving through a simple load control mechanism. SIGARCH Computer Architecture News 35(4): 29-36 (2007)
- [c2]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero: Runahead Threads: Reducing Resource Contention in SMT Processors. PACT 2007: 423
- 2006
- [c1]Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero: Kilo-instruction processors, runahead and prefetching. Conf. Computing Frontiers 2006: 269-278
- 2005
- [j1]Adrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero: Kilo-Instruction Processors: Overcoming the Memory Wall. IEEE Micro 25(3): 48-57 (2005)
Coauthor Index
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last updated on 2013-05-19 19:31 CEST by the dblp team