S. Ramesh

Jean-Vivien Millo, S. Ramesh, Shankara Narayanan Krishna, Ganesh Khandu Narwane: Compositional Verification of Software Product Lines. IFM 2013: 109-123

S. Ramesh, S. Kannan, S. Baskar: Application of modified NSGA-II algorithm to multi-objective reactive power planning. Appl. Soft Comput. 12(2): 741-753 (2012)

Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A dynamic assertion-based verification platform for validation of UML designs. ACM SIGSOFT Software Engineering Notes 37(1): 1-14 (2012)

Manoranjan Satpathy, Anand Yeolekar, Prakash Peranandam, S. Ramesh: Efficient coverage of parallel and hierarchical stateflow models for test case generation. Softw. Test., Verif. Reliab. 22(7): 457-479 (2012)

Jean-Vivien Millo, S. Ramesh: Relating Requirement and Design Variabilities. APSEC Workshops 2012: 35-42

Kamalesh Ghosh, Pallab Dasgupta, S. Ramesh: Planning with Action Prioritization and New Benchmarks for Classical Planning. Australasian Conference on Artificial Intelligence 2012: 779-790

A. C. Rajeev, Swarup Mohalik, S. Ramesh: Verifying timing synchronization constraints in distributed embedded architectures. DATE 2012: 200-205

Prakash Peranandam, Sachin Raviram, Manoranjan Satpathy, Anand Yeolekar, Ambar A. Gadkari, S. Ramesh: An integrated test generation tool for enhanced coverage of Simulink/Stateflow models. DATE 2012: 308-311

Sachin Raviram, Prakash Peranandam, Manoranjan Satpathy, S. Ramesh: SmartTestGen+: A Test Suite Booster for Enhanced Structural Coverage. ICTAC 2012: 164-167

Silky Arora, Prahladavaradan Sampath, S. Ramesh: Resolving uncertainty in automotive feature interactions. RE 2012: 21-30

Swarup Mohalik, S. Ramesh, Jean-Vivien Millo, Shankara Narayanan Krishna, Ganesh Khandu Narwane: Tracing SPLs precisely and efficiently. SPLC (1) 2012: 186-195

Shankara Narayanan Krishna, Ganesh Khandu Narwane, S. Ramesh, Swarup Mohalik, Jean-Vivien Millo: Formalizing Traceability and Derivability in Software Product Lines. CoRR abs/1201.0595 (2012)

Jean-Vivien Millo, S. Ramesh, Shankara Narayanan Krishna, Ganesh Khandu Narwane: Compositional Verification of Evolving Software Product Lines. CoRR abs/1212.4258 (2012)

Silky Arora, Ambar A. Gadkari, S. Ramesh: Scenario-Based Specification of Automotive Requirements With Quantitative Constraints and Synthesis of SL/SF Monitors. Embedded Systems Letters 3(2): 62-65 (2011)

Manoj G. Dixit, S. Ramesh, Pallab Dasgupta: Some results on Parametric Temporal Logic. Inf. Process. Lett. 111(20): 994-998 (2011)

S. Ramesh, Ambar A. Gadkari: Rigorous model-based design & verification flow for in-vehicle software. DAC 2011: 13-16

Sumit Kumar Jha, Christopher James Langmead, Swarup Mohalik, S. Ramesh: When to stop verification?: Statistical trade-off between expected loss and simulation cost. DATE 2011: 1309-1314

Manfred Broy, Samarjit Chakraborty, Dip Goswami, S. Ramesh, Manoranjan Satpathy, Stefan Resmerita, Wolfgang Pree: Cross-layer analysis, testing and verification of automotive control software. EMSOFT 2011: 263-272

G. Subrahmanya V. R. K. Rao, Jeyabalan Saravanakumar, Karthik Sundararaman, Jinka Parthasarathi, S. Ramesh: Intelligent Green IT Management for Enterprises through System Profiling. GreenCom 2011: 206-211

G. Subrahmanya V. R. K. Rao, S. Ramesh, V. Arun Muthuraj, Karthik Sundararaman, Jinka Parthasarathi: CGLive - A Real Time Power Monitoring Solution for Enterprises. GreenCom 2011: 212-215

Jean-Vivien Millo, Swarup Mohalik, S. Ramesh: Integrated analysis of software product lines: a constraint based framework for consistency, liveness, and commonness checking. ISEC 2011: 41-50

Prahladavaradan Sampath, Silky Arora, S. Ramesh: Evolving specifications formally. RE 2011: 5-14

Manoj G. Dixit, Pallab Dasgupta, S. Ramesh: Taming the component timing: A CBD methodology for real-time embedded systems. DATE 2010: 1649-1652

A. C. Rajeev, Swarup Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh: Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimation. EMSOFT 2010: 129-138

Samarjit Chakraborty, S. Ramesh, Jürgen Teich: Model-based analysis, synthesis and testing of automotive hardware/software architectures. EMSOFT 2010: 299-300

A. C. Rajeev, Prahladavaradan Sampath, K. C. Shashidhar, S. Ramesh: CoGenTe: a tool for code generator testing. ASE 2010: 349-350

S. Ramesh, L. Karunamoorthy, V. S. Senthilkumar, K. Palanikumar: Experimental study on machining of titanium alloy (Ti64) by CVD and PVD coated carbide inserts. IJMTM 17(4): 373-385 (2009)

Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. ACM Trans. Design Autom. Electr. Syst. 14(2) (2009)

Deepak D'Souza, Madhu Gopinathan, S. Ramesh, Prahladavaradan Sampath: Supervisory control for real-time systems based on conflict-tolerant controllers. CASE 2009: 555-560

Aditya Kanade, Rajeev Alur, Franjo Ivancic, S. Ramesh, Sriram Sankaranarayanan, K. C. Shashidhar: Generating and Analyzing Symbolic Traces of Simulink/Stateflow Models. CAV 2009: 430-445

R. Venkatraman, R. Castagnetti, Andres Teene, Benjamin Mbouombouo, S. Ramesh: Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design. ISQED 2009: 27-32

Purandar Bhaduri, S. Ramesh: Interface synthesis and protocol conversion. Formal Asp. Comput. 20(2): 205-224 (2008)

Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227

Ambar A. Gadkari, Anand Yeolekar, J. Suresh, S. Ramesh, Swarup Mohalik, K. C. Shashidhar: AutoMOTGen: Automatic Model Oriented Test Generator for Embedded Control Systems. CAV 2008: 204-208

Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang: Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. DAC 2008: 296-299

Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: A Formal Approach To The Protocol Converter Problem. DATE 2008: 294-299

Rajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shashidhar: Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. EMSOFT 2008: 89-98

Manoranjan Satpathy, Anand Yeolekar, S. Ramesh: Randomized directed testing (REDIRECT) for Simulink/Stateflow models. EMSOFT 2008: 217-226

Deepak D'Souza, Madhu Gopinathan, S. Ramesh, Prahladavaradan Sampath: Conflict-Tolerant Real-Time Features. QEST 2008: 274-283

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Behaviour Directed Testing of Auto-code Generators. SEFM 2008: 191-200

Samarjit Chakraborty, Sethu Ramesh: Programming and Performance Modelling of Automotive ECU Networks. VLSI Design 2008: 8-9

Alain Girault, S. Ramesh, Jean-Pierre Talpin: Synchronous Paradigm in Embedded Systems. EURASIP J. Emb. Sys. 2007 (2007)

Manoranjan Satpathy, S. Ramesh: Test case generation from formal models through abstraction refinement and model checking. A-MOST 2007: 85-94

Andrei Hagiescu, Unmesh D. Bordoloi, Samarjit Chakraborty, Prahladavaradan Sampath, P. Vignesh V. Ganesan, Sethu Ramesh: Performance Analysis of FlexRay-based ECU Networks. DAC 2007: 284-289

Vijay D'Silva, Sampada Sonalkar, S. Ramesh: Existential abstractions for distributed reactive systems via syntactic transformations. EMSOFT 2007: 240-248

Pemadeep Ramsokul, Arcot Sowmya, S. Ramesh: A Test Bed for Web Services Protocols. ICIW 2007: 16

S. Ramesh, Sneha Kumar Kasera: Best Effort Session-Level Congestion Control. ICNP 2007: 236-245

Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Testing Model-Processing Tools for Embedded Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 203-214

Ajith K. John, Babita Sharma, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh: Detection of Runtime Errors in MISRA C Programs: A Deductive Approach. SAFECOMP 2007: 491-504

Prahladavaradan Sampath, A. C. Rajeev, K. C. Shashidhar, S. Ramesh: How to Test Program Generators? A Case Study using flex. SEFM 2007: 80-92

Sethu Ramesh, P. Vignesh V. Ganesan, Gurulingesh Raravi: A Formal Framework for the Correct-by-construction and Verification of Distributed Time Triggered Systems. SIES 2007: 63-70

Manoranjan Satpathy, Michael J. Butler, Michael Leuschel, S. Ramesh: Automatic Testing from Formal Specifications. TAP 2007: 95-113

Ambar A. Gadkari, S. Ramesh: Automated Synthesis of Assertion Monitors using Visual Specifications. CoRR abs/0710.4698 (2007)

R. Manoharan, P. Thambidurai, S. Ramesh: Power aware scalable multicast routing protocol for MANETs. Int. J. Communication Systems 19(10): 1089-1101 (2006)

Manjit Singh Sidhu, N. Selvanathan, S. Ramesh: CAL Student Coaching Environment and Virtual Reality in Mechanical Engineering. IJICTE 2(1): 12-27 (2006)

Mangala Gowri Nanda, S. Ramesh: Interprocedural slicing of multithreaded programs with applications to Java. ACM Trans. Program. Lang. Syst. 28(6): 1088-1144 (2006)

Purandar Bhaduri, S. Ramesh: Synthesis of Synchronous Interfaces. ACSD 2006: 208-216

R. Venkatraman, R. Castagnetti, S. Ramesh: The Statistics of Device Variations and its Impact on SRAM Bitcell Performance, Leakage and Stability. ISQED 2006: 190-195

Ambar A. Gadkari, S. Ramesh: Automated Synthesis of Assertion Monitors using Visual Specifications. DATE 2005: 390-395

R. Castagnetti, R. Venkatraman, B. Bartz, C. Monzel, T. Briscoe, Andres Teene, S. Ramesh: A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ISQED 2005: 193-196

Andres Teene, Bob Davis, R. Castagnetti, J. Brown, S. Ramesh: Impact of Interconnect Process Variations on Memory Performance and Design. ISQED 2005: 694-699

S. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi: A Toolset for Modelling and Verification of GALS Systems. CAV 2004: 506-509

Vijay D'Silva, S. Ramesh, Arcot Sowmya: Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures. DATE 2004: 390-395

Ambar A. Gadkari, S. Ramesh, Rubin A. Parekhji: CESC: a visual formalism for specification and verification of SoCs. ACM Great Lakes Symposium on VLSI 2004: 354-357

S. Ramesh, Aditya Rajeev Kulkarni, V. Kamat: Slicing tools for synchronous reactive programs. ISSTA 2004: 217-220

Vijay D'Silva, S. Ramesh, Arcot Sowmya: Bridge Over Troubled Wrappers: Automated Interface Synthesis. VLSI Design 2004: 189-194

Purandar Bhaduri, S. Ramesh: Model Checking of Statechart Models: Survey and Research Directions. CoRR cs.SE/0407038 (2004)

F. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, S. Ramesh: Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability. ISQED 2003: 119-124

Mangala Gowri Nanda, S. Ramesh: Pointer Analysis of Multithreaded Java Programs. SAC 2003: 1068-1075

Asif Iqbal, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh: Visual Modeling and Verification of Distributed Reactive Systems. SAFECOMP 2003: 22-34

Aditya Rajeev Kulkarni, S. Ramesh: Static Slicing of Reactive Programs. SCAM 2003: 98-107

Vinod Ganapathy, S. Ramesh: Slicing Synchronous Reactive Programs. Electr. Notes Theor. Comput. Sci. 65(5): 50-64 (2002)

Partha S. Roop, Arcot Sowmya, S. Ramesh: k-time Forced Simulation: A Formal Verification Technique for IP Reuse. ICCD 2002: 50-55

Babita Sharma, S. D. Dhodapkar, S. Ramesh: Assertion Checking Environment (ACE) for Formal Verification of C Programs. SAFECOMP 2002: 284-295

Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan: Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract). VLSI Design 2002: 11-13

Partha S. Roop, Arcot Sowmya, S. Ramesh: Forced simulation: A technique for automating component reuse in embedded systems. ACM Trans. Design Autom. Electr. Syst. 6(4): 602-628 (2001)

Sridhar Iyer, S. Ramesh: Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object-Oriented Programs. IEEE Trans. Software Eng. 27(11): 1037-1056 (2001)

Partha S. Roop, Arcot Sowmya, S. Ramesh: A formal approach to component based development of synchronous programs. ASP-DAC 2001: 421-424

R. K. Shyamasundar, S. Ramesh: Languages for Reactive Specifications: Synchrony Vs Asynchrony. Int. J. Found. Comput. Sci. 11(2): 283-314 (2000)

Partha S. Roop, Arcot Sowmya, S. Ramesh: Automated Component Adaptation by Forced Simulation. ACAC 2000: 74-81

Mangala Gowri Nanda, S. Ramesh: Slicing concurrent programs. ISSTA 2000: 180-190

Partha S. Roop, Arcot Sowmya, S. Ramesh: Automatic Component Matching Using Forced Simulation. VLSI Design 2000: 64-69

S. Ramesh: Implementation of communicating reactive processes. Parallel Computing 25(6): 703-727 (1999)

S. Ramesh, Purandar Bhaduri: Validation of Pipelined Processor Designs Using Esterel Tools: A Case Study. CAV 1999: 84-95

S. Ramesh: Efficient Translation of Statecharts to Hardware Circuits. VLSI Design 1999: 384-389

S. Ramesh, Chandrashekar M. Shetty: Impossibility of Synchronization in the Presence of Preemption. Parallel Processing Letters 8(1): 111-120 (1998)

Arcot Sowmya, S. Ramesh: Extending Statecharts with Temporal Logic. IEEE Trans. Software Eng. 24(3): 216-231 (1998)

Sridhar Iyer, S. Ramesh: A Tool-Suite for Reachability Analysis of Concurrent Object-Oriented Programs. APSEC 1997: 160-

Sameer Mahajan, S. Ramesh: Concurrent Logic Programming and pi Calculus. ICLP 1997: 411

S. Ramesh, R. Lakshmi, R. Govindarajan: Distributed Shared Memory on IBM SP2. ICPADS 1997: 338-345

S. Ramesh, G. Sivakumar (Eds.): Foundations of Software Technology and Theoretical Computer Science, 17th Conference, Kharagpur, India, December 18-20, 1997, Proceedings. Lecture Notes in Computer Science 1346, Springer 1997, isbn 3-540-63876-8

S. Ramesh, Bommadevara N. Srinivas: A Direct Characterization of Completion. Theor. Comput. Sci. 154(2): 379-385 (1996)

R. K. Shyamasundar, S. Ramesh: Languages for Reactive Specifications: Synchrony Vs Asynchrony. FTRTFT 1994: 621-640

R. K. Shyamasundar, S. Ramesh: Semantics and Verification of Hierarchical CRP Programs. Hybrid Systems 1994: 436-461

G. Berry, S. Ramesh, R. K. Shyamasundar: Communicating Reactive Processes. POPL 1993: 85-98

Jozef Hooman, S. Ramesh, Willem P. de Roever: A Compositional Axiomatization of Statecharts. Theor. Comput. Sci. 101(2): 289-335 (1992)

S. Ramesh: Fully Abstract Semantics for Higher Order Communicating Systems. MFCS 1992: 463-471

S. Ramesh: On the Completeness of Modular Proof Systems. Inf. Process. Lett. 36(4): 195-201 (1990)

S. Ramesh, S. L. Mehndiratta: A Methodology for Developing Distributed Programs. IEEE Trans. Software Eng. 13(8): 967-976 (1987)

S. Ramesh: A New Efficient Implementation of CSP with Output Guards. ICDCS 1987: 266-273

S. Ramesh: A New and Efficient Implementation of Multiprocess Synchronization. PARLE (2) 1987: 387-401

S. Ramesh, S. L. Mehndiratta: A New Class of High Level Programs for Distributed Computing Systems. FSTTCS 1985: 42-72

S. Ramesh, S. L. Mehndiratta: The Liveness Property of On-the-Fly Garbage Collector - A Proof. Inf. Process. Lett. 17(4): 189-195 (1983)