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 | 2002 | |
|---|---|---|
| j4 |      | Sumant Ramprasad, Ibrahim N. Hajj, Farid N. Najm: A technique for Improving dual-output domino logic. IEEE Trans. VLSI Syst. 10(4): 508-511 (2002) |
| 1999 | ||
| j3 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: A coding framework for low-power address and data busses. IEEE Trans. VLSI Syst. 7(2): 212-221 (1999) |
| j2 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Information-theoretic bounds on average signal transition activity [VLSI systems]. IEEE Trans. VLSI Syst. 7(3): 359-368 (1999) |
| c6 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Low-power distributed arithmetic architectures using nonuniform memory partitioning. ISCAS (3) 1999: 470-473 |
| c5 | | Sumant Ramprasad, Ibrahim N. Hajj, Farid N. Najm: An optimization technique for dual-output domino logic. ISLPED 1999: 258-260 |
| 1998 | ||
| c4 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Decorrelating (DECOR) transformations for low-power adaptive filters. ISLPED 1998: 250-255 |
| c3 |  | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Coding for Low-Power Address and Data Busses: A Source-Coding Framework and Applications. VLSI Design 1998: 18-23 |
| 1997 | ||
| j1 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Analytical estimation of signal transition activity from word-level statistics. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 718-733 (1997) |
| c2 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Analytical Estimation of Transition Activity From Word-Level Signal Statistics. DAC 1997: 582-587 |
| c1 | | Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj: Achievable bounds on signal transition activity. ICCAD 1997: 126-129 |
| 1 | Ibrahim N. Hajj | |
| 2 | Farid N. Najm | |
| 3 | Naresh R. Shanbhag |
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