Vijay Janapa Reddi

Vijay Janapa Reddi, David Z. Pan, Sani R. Nassif, Keith A. Bowman: Robust and resilient designs from the bottom-up: Technology, CAD, circuit, and system issues. ASP-DAC 2012: 7-16

Simone Campanoni, Timothy M. Jones, Glenn H. Holloway, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks: HELIX: automatic parallelization of irregular programs for chip multiprocessing. CGO 2012: 84-93

Vijay Janapa Reddi: Hardware and software co-design for robust and resilient execution. CTS 2012: 380

Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks: Voltage Noise in Production Processors. IEEE Micro 31(1): 20-28 (2011)

Vijay Janapa Reddi, David Brooks: Resilient Architectures via Collaborative Design: Maximizing Commodity Processor Performance in the Presence of Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 30(10): 1429-1445 (2011)

Vijay Janapa Reddi, Benjamin C. Lee, Trishul M. Chilimbi, Kushagra Vaid: Mobile processors for energy-efficient web search. ACM Trans. Comput. Syst. 29(3): 9 (2011)

Peter Bailis, Vijay Janapa Reddi, Sanjay Gandhi, David Brooks, Margo I. Seltzer: Dimetrodon: processor-level preventive thermal management via idle cycle injection. DAC 2011: 89-94

Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Michael D. Smith, Gu-Yeon Wei, David Brooks: Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity. IEEE Micro 30(1): 110 (2010)

Vijay Janapa Reddi, Simone Campanoni, Meeta Sharma Gupta, Michael D. Smith, Gu-Yeon Wei, David Brooks, Kim M. Hazelwood: Eliminating voltage emergencies via software-guided code transformations. TACO 7(2) (2010)

Vijay Janapa Reddi, Benjamin C. Lee, Trishul M. Chilimbi, Kushagra Vaid: Web search using mobile cores: quantifying and mitigating the price of efficiency. ISCA 2010: 314-325

Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks: Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling. MICRO 2010: 77-88

Alex Shye, Joseph Blomstedt, Tipp Moseley, Vijay Janapa Reddi, Daniel A. Connors: PLR: A Software Approach to Transient Fault Tolerance for Multicore Architectures. IEEE Trans. Dependable Sec. Comput. 6(2): 135-148 (2009)

Vijay Janapa Reddi, Simone Campanoni, Meeta Sharma Gupta, Michael D. Smith, Gu-Yeon Wei, David M. Brooks: Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack. DAC 2009: 788-793

Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks: An event-guided approach to reducing voltage noise in processors. DATE 2009: 160-165

Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Gu-Yeon Wei, Michael D. Smith, David Brooks: Voltage emergency prediction: Using signatures to reduce operating margins. HPCA 2009: 18-29

Vijay Janapa Reddi, Dan Connors, Robert Cohn, Michael D. Smith: Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. CGO 2007: 74-88

Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Dirk Grunwald, Ramesh Peri: Shadow Profiling: Hiding Instrumentation Costs with Parallelism. CGO 2007: 198-208

Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Joseph Blomstedt, Daniel A. Connors: Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance. DSN 2007: 297-306

Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006)

Vijay Janapa Reddi, Dan Connors, Robert S. Cohn: Persistence in dynamic code transformation systems. SIGARCH Computer Architecture News 33(5): 69-74 (2005)

Alex Shye, Matthew Iyer, Tipp Moseley, David Hodgdon, Dan Fay, Vijay Janapa Reddi, Daniel A. Connors: Analysis of path profiling information generated with performance monitoring hardware. Interaction between Compilers and Computer Architectures 2005: 34-43

Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Daniel A. Connors: Code coverage testing using hardware performance monitoring support. AADEBUG 2005: 159-163

Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, David Hodgdon, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors: Dynamic run-time architecture techniques for enabling continuous optimization. Conf. Computing Frontiers 2005: 211-220

Silvia M. Figueira, Vijay Janapa Reddi: Topology-Based Hypercube Structures for Global Communication in Heterogeneous Networks. Euro-Par 2005: 994-1004

Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282

Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood: Pin: building customized program analysis tools with dynamic instrumentation. PLDI 2005: 190-200