Ricardo Augusto da Luz Reis

Ricardo A. L. Reis, Ricardo Reis

	2013
j21		Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis: Revisiting automated physical synthesis of high-performance clock networks. ACM Trans. Design Autom. Electr. Syst. 18(2): 31 (2013)
	2012
j20		Matthew R. Guthaus, Xuchu Hu, Gustavo Wilke, Guilherme Flach, Ricardo Reis: High-performance clock mesh optimization. ACM Trans. Design Autom. Electr. Syst. 17(3): 33 (2012)
c90		Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge Tonfat, Ricardo Reis: Soft-Error Probability Due to SET in Clock Tree Networks. ISVLSI 2012: 338-343
c89		Cristiano Santos, Ricardo Reis, Guilherme Godoi, Marcos Barros, Fabio Duarte: Multi-bit flip-flop usage impact on physical synthesis. SBCCI 2012: 1-6
e8		José L. Ayala, David Atienza Alonso, Ricardo Reis (Eds.): VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers. IFIP Advances in Information and Communication Technology 373, Springer 2012, isbn 978-3-642-28565-3
e7		Srinivas Katkoori, Matthew R. Guthaus, Ayse Kivilcim Coskun, Andreas Burg, Ricardo Reis (Eds.): 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012. IEEE 2012, isbn 978-1-4673-2657-5
	2011
j19		Massimo Violante, Cristina Meinhardt, Ricardo Reis, Matteo Sonza Reorda: A Low-Cost Solution for Deploying Processor Cores in Harsh Environments. IEEE Transactions on Industrial Electronics 58(7): 2617-2626 (2011)
p1		Ricardo Reis: Design Tools and Methods for Chip Physical Design. Multiprocessor System-on-Chip 2011: 155-166
c88		Sidinei Ghissoni, Eduardo Costa, José C. Monteiro, Ricardo Reis: Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization. ICECS 2011: 567-570
c87		Gerson Scartezzini, Ricardo Reis: Power consumption in transistor networks versus in standard cells. ICECS 2011: 740-743
c86		Ricardo Reis: Design automation of transistor networks, a new challenge. ISCAS 2011: 2485-2488
c85		Gracieli Posser, Guilherme Flach, Gustavo Wilke, Ricardo Reis: Gate Sizing Minimizing Delay and Area. ISVLSI 2011: 315-316
c84		Guilherme Flach, Marcelo O. Johann, Ricardo Reis: Quadratic placement with single-iteration linear system solver. SBCCI 2011: 109-112
e6		Jürgen Becker, Marcelo O. Johann, Ricardo Reis (Eds.): VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers. IFIP Advances in Information and Communication Technology 360, Springer 2011, isbn 978-3-642-23119-3
	2010
j18		Sandro Sawicki, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis: 3D-Via Driven Partitioning for 3D VLSI Integrated Circuits. CLEI Electron. J. 13(3) (2010)
j17		Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis: Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies. Microelectronics Reliability 50(9-11): 1241-1246 (2010)
c83		Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis: Non-uniform clock mesh optimization with linear programming buffer insertion. DAC 2010: 74-79
c82		Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Reis: The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. ICCD 2010: 195-202
c81		Jorge Tonfat, Ricardo Reis: Design and verification of a layer-2 Ethernet MAC classification engine for a Gigabit Ethernet switch. ICECS 2010: 146-149
c80		Tiago Reimann, Glauco B. V. Santos, Ricardo A. L. Reis: Routing algorithms performance in different routing scopes. ICECS 2010: 643-646
c79		Gracieli Posser, Adriel Ziesemer, Daniel Guimares Jr., Gustavo Wilke, Ricardo A. L. Reis: A study on layout quality of automatic generated cells. ICECS 2010: 651-654
c78		Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis: Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach. ICECS 2010: 859-862
c77		Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Predictive error detection by on-line aging monitoring. IOLTS 2010: 9-14
c76		Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis: Evaluating transient-fault effects on traditional C-element's implementations. IOLTS 2010: 35-40
c75		Felipe Pinto, Lucas Cavalheiro, Marcelo de Oliveira Johann, Ricardo Reis: Logical Core Algorithm: Improving Global Placement. ISVLSI 2010: 69-73
c74		Guilherme Flach, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis: A Mesh-Buffer Displacement Optimization Strategy. ISVLSI 2010: 282-287
c73		Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, João Paulo Teixeira: Low-sensitivity to process variations aging sensor for automotive safety-critical applications. VTS 2010: 238-243
	2009
j16		Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Design of a soft-error robust microprocessor. Microelectronics Journal 40(7): 1062-1068 (2009)
j15		Renato Fernandes Hentschke, Jagannathan Narasimhan, Marcelo O. Johann, Ricardo Reis: Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff. IEEE Trans. VLSI Syst. 17(8): 1073-1086 (2009)
c72		Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis: A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. DATE 2009: 352-357
c71		Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis: An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. DFT 2009: 254-262
c70		Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis: An automated design methodology for layout generation targeting power leakage minimization. ICECS 2009: 81-84
c69		Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: On the accuracy of Elmore-based Delay Models. ICECS 2009: 447-450
c68		Sandro Sawicki, Gustavo Wilke, Marcelo de Oliveira Johann, Ricardo Reis: A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits. ICECS 2009: 852-855
c67		Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Built-in aging monitoring for safety-critical applications. IOLTS 2009: 9-14
c66		Rodrigo Possamai Bastos, Yannick Monnet, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis: Comparing transient-fault effects on synchronous and on asynchronous circuits. IOLTS 2009: 29-34
c65		Sidinei Ghissoni, João Baptista dos Santos Martins, Ricardo Augusto da Luz Reis, José C. Monteiro: Analysis of Power Consumption Using a New Methodology for the Capacitance Modeling of Complex Logic Gates. PATMOS 2009: 297-306
c64		Érika F. Cota, Luigi Carro, Felipe Pinto, Ricardo Augusto da Luz Reis, Marcelo Lubaszewski: Resource-and-time-aware test strategy for configurable quaternary logic blocks. SBCCI 2009
c63		Gustavo Neuberger, Gilson I. Wirth, Ricardo Reis: Protecting digital circuits against hold time violation due to process variability. SBCCI 2009
c62		Sergio Bampi, Ricardo Reis: Challenges and Emerging Technologies for System Integration beyond the End of the Roadmap of Nano-CMOS. VLSI-SoC 2009: 21-33
	2008
j14		Lucas Brusamarello, Roberto da Silva, Gilson I. Wirth, Ricardo A. L. Reis: Probabilistic Approach for Yield Analysis of Dynamic Logic Circuits. IEEE Trans. on Circuits and Systems 55-I(8): 2238-2248 (2008)
c61		Pasquale Delizia, Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto, Carlos Azeredo Leme, Ricardo Reis: Design procedure for DVB-T receivers large tuning range LP filter. ISCAS 2008: 2913-2916
c60		Gustavo Wilke, Ricardo Reis: A New Clock Mesh Buffer Sizing Methodology for Skew and Power Reduction. ISVLSI 2008: 227-232
c59		Gustavo Wilke, Renan Fonseca, Cecilia Mezzomo, Ricardo Reis: A novel scheme to reduce short-circuit power in mesh-based clock architectures. SBCCI 2008: 117-122
	2007
j13		Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara, Luigi Carro, Ricardo Reis, Xavier Guerin, Ahmed Amine Jerraya: Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC. Design Autom. for Emb. Sys. 11(4): 249-283 (2007)
j12		Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel: A Case Study on Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis. J. Electronic Testing 23(6): 625-633 (2007)
j11		Lucas Brusamarello, Roberto da Silva, Gilson I. Wirth, Ricardo Augusto da Luz Reis: Técnicas probabilísticas para análise de yield em nível elétrico usando propagação de erros e derivadas numéricas. RITA 14(2): 69-89 (2007)
j10		Leandro Soares Indrusiak, Manfred Glesner, Ricardo Reis: On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems. IEEE Transactions on Industrial Electronics 54(6): 3069-3077 (2007)
c58		Renato Fernandes Hentschke, Ricardo Reis: A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. ISCAS 2007: 2036-2039
c57		Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis: Maze routing steiner trees with effective critical sink optimization. ISPD 2007: 135-142
c56		Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: 3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. ISVLSI 2007: 67-72
c55		Lucas Brusamarello, Roberto da Silva, Ricardo A. L. Reis, Gilson I. Wirth: Yield Analysis by Error Propagation Using Numerical Derivatives Considering WD and D2D variations. ISVLSI 2007: 86-91
c54		José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304
c53		Guilherme Flach, Marcelo de Oliveira Johann, Renato Fernandes Hentschke, Ricardo Reis: Cell placement on graphics processing units. SBCCI 2007: 87-92
c52		Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya: Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES 2007: 81-89
c51		Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha: Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC 2007: 78-83
c50		Lucas Brusamarello, Roberto da Silva, Gilson I. Wirth, Ricardo A. L. Reis: Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level. VLSI-SoC 2007: 94-98
c49		Cristiano Lazzari, Cristiano Santos, Adriel Ziesemer, Lorena Anghel, Ricardo Reis: Efficient timing closure with a transistor level design flow. VLSI-SoC 2007: 312-315
e5		Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer (Eds.): VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia. IFIP 240, Springer 2007, isbn 978-0-387-73660-0
	2006
c48		Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel: Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study. IOLTS 2006: 165-172
c47		Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Design of a Robust 8-Bit Microprocessor to Soft Errors. IOLTS 2006: 195-196
c46		Glauco Borges Valim dos Santos, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: Channel based routing in channel-less circuits. ISCAS 2006
c45		Claudio Menezes, Cristina Meinhardt, Ricardo Reis, Reginaldo Tavares: A Regular Layout Approach for ASICs. ISVLSI 2006: 424-425
c44		José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes: Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427
c43		Daniel Lima Ferrão, Ricardo Reis, José Luís Almada Güntzel: Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis. PATMOS 2006: 301-310
c42		José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613
c41		Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates. SBCCI 2006: 196-201
c40		Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis: Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. SBCCI 2006: 220-225
c39		Renato Fernandes Hentschke, Sandro Sawicki, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. VLSI-SoC 2006: 128-133
	2005
j9		Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis: An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. IEEE Design & Test of Computers 22(1): 50-58 (2005)
j8		Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis: Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. RITA 12(1): 47-60 (2005)
c38		Lisane B. de Brisolara, Leandro Buss Becker, Luigi Carro, Flávio Rech Wagner, Carlos Eduardo Pereira, Ricardo Reis: Comparing high-level modeling approaches for embedded system design. ASP-DAC 2005: 986-989
c37		Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis: On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study. IOLTS 2005: 29-34
c36		Cristiano Santos, Daniel Lima Ferrão, Ricardo Reis, José Luís Güntzel: Incremental timing optimization for automatic layout generation. ISCAS (4) 2005: 3567-3570
c35		Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis: Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. PATMOS 2005: 59-68
c34		José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin: Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201
c33		Leonardo Londero de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José C. Monteiro, João Baptista dos Santos Martins, Sergio Bampi, Ricardo Augusto da Luz Reis: A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. VLSI-SoC 2005: 25-39
c32		César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis: Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194
c31		Cristiano Lazzari, Lorena Anghel, Ricardo Reis: A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming. VLSI-SoC 2005: 331-344
	2004
j7		Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis: Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Design & Test of Computers 21(6): 552-562 (2004)
j6		Leandro Soares Indrusiak, Ricardo A. L. Reis, Manfred Glesner: Um Framework de Apoio à Colaboração no Projeto Distribuído de Sistemas Integrados. RITA 11(2): 49-74 (2004)
c30		Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel: Physical design methodologies for performance predictability and manufacturability. Conf. Computing Frontiers 2004: 390-397
c29		Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis: Designing and testing fault-tolerant techniques for SRAM-based FPGAs. Conf. Computing Frontiers 2004: 419-432
c28		Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi: Design of Very Deep Pipelined Multipliers for FPGAs. DATE 2004: 52-57
c27		Ricardo Reis: Requirements for Computer-Aided Learning from the Point of View of Electronic Design. EDUTECH 2004: 63-68
c26		Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis: A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool. PATMOS 2004: 732-741
c25		Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Accurate capture of timing parameters in inductively-coupled on-chip interconnects. SBCCI 2004: 117-122
c24		Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis: Lookup-based Remote Laboratory for FPGA Digital Design Prototyping. VIRTUAL-LAB 2004: 3-11
e4		Ricardo Reis (Ed.): Information Technology, Selected Tutorials, IFIP 18th World Computer Congress, Tutorials, 22-27 August 2004, Toulouse, France. Kluwer 2004, isbn 1-4020-8158-8
	2003
j5		Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Ricardo Augusto da Luz Reis: A multiple bit upset tolerant SRAM memory. ACM Trans. Design Autom. Electr. Syst. 8(4): 577-590 (2003)
c23		Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis: Designing fault tolerant systems into SRAM-based FPGAs. DAC 2003: 650-655
c22		Leandro Soares Indrusiak, Florian Lubitz, Ricardo Augusto da Luz Reis, Manfred Glesner: Ubiquitous Access to Reconfigurable Hardware: Application Scenarios and Implementation Issues. DATE 2003: 10940-10945
c21		Alex Panato, Marcelo Barcelos, Ricardo Augusto da Luz Reis: A Low Device Occupation IP to Implement Rijndael Algorithm. DATE 2003: 20020-20025
c20		Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner: Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models. FDL 2003: 364-373
c19		Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis: Reducing pin and area overhead in fault-tolerant FPGA-based designs. FPGA 2003: 108-117
c18		Renato Fernandes Hentschke, Ricardo Reis: Plic-Plac: a novel constructive algorithm for placement. ISCAS (5) 2003: 461-464
c17		Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, Giuliana Alcántara, Stefan Hoermann, Ralf Steinmetz: Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. MSE 2003: 57-58
c16		Alexandre Casacurta, Marcel Furtado Almeida, Ricardo Augusto da Luz Reis: A Visual Simulation Tool at Layout Level. MSE 2003: 110-111
c15		Ricardo Augusto da Luz Reis: Power and Timing Driven Physical Design Automation. PATMOS 2003: 348-357
c14		Renato Fernandes Hentschke, Ricardo Augusto da Luz Reis: Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. SBCCI 2003: 267-
c13		Daniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel: Improving Critical Path Identification in Functional Timing Analysis. SBCCI 2003: 297-302
c12		Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel: A Transistor Sizing Method Applied to an Automatic Layout Generation Tool. SBCCI 2003: 303-
c11		Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis: A New Macro-cell Generation Strategy for three metal layer CMOS Technologies. VLSI-SOC 2003: 193-197
c10		Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis: A study on the performance of fast initial placement algorithms. VLSI-SOC 2003: 204-
e3		Lillian N. Cassel, Ricardo Augusto da Luz Reis (Eds.): Informatics Curricula and Teaching Methods, IFIP TC3 / WG3.2 Conference on Informatics Curricula, Teaching Methods and Best Practics (ICTEM 2002), July 10-12, 2002, Florianópolis, SC, Brazil. IFIP Conference Proceedings 245, Kluwer 2003, isbn 1-4020-7266-X
e2		Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf (Eds.): IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003. Technische Universität Darmstadt, Insitute of Microelectronic Systems 2003, isbn 3-901882-17-0
	2002
c9		Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis: Comparative Analysis and Application of Data Repository Infrastructure for Collaboration-Enabled Distributed Design Environments. DATE 2002: 1130
c8		Lillian N. Cassel, Gordon Davies, Deepak Kumar, Ralf Denzer, A. E. N. Hacquebard, Richard J. LeBlanc, Luiz Ernesto Merkle, Fred Mulder, Zeljko Panian, Ricardo Augusto da Luz Reis, Eric Roberts, Paolo Rocchi, Maarten van Veen, Avelino F. Zorzo: Computing: The Shape of an Evolving Discipline. Informatics Curricula and Teaching Methods 2002: 131-138
c7		Fernanda Gusmão de Lima, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis: Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW 2002: 194
	2001
j4		Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis: Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electronic Testing 17(2): 149-161 (2001)
j3		Leandro Soares Indrusiak, Ricardo Augusto da Luz Reis: 3D integrated circuit layout visualization using VRML. Future Generation Comp. Syst. 17(5): 503-511 (2001)
j2		José Luís Almada Güntzel, Ricardo Augusto da Luz Reis: Análise de Timing Funcional de Circuitos VLSI Contendo Portas Complexas. RITA 8(1): 111-142 (2001)
c6		Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis: Distributed Collaborative Design over Cave2 Framework. VLSI-SOC 2001: 97-108
	2000
j1		João Leonardo Fragoso, Eduardo Costa Pereira, Juergen Rochol, Sergio Bampi, Ricardo Reis: Specification and design of an Ethernet Interface soft IP. J. Braz. Comp. Soc. 6(3): 5-12 (2000)
c5		Júlio Henrique Araújo Pereira Machado, Carlos Tadeu Q. de Morais, Paulo Blauth Menezes, Ricardo Reis: Structuring Web course pages as Automata: revising concepts. RIAO 2000: 150-159
c4		Marcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng: Admissibility Proofs for the LCS* Algorithm. IBERAMIA-SBIA 2000: 236-244
e1		L. Miguel Silveira, Srinivas Devadas, Ricardo Augusto da Luz Reis (Eds.): VLSI: Systems on a Chip, IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI '99), December 1-4, 1999, Lisbon, Portugal. IFIP Conference Proceedings 162, Kluwer 2000, isbn 0-7923-7731-1
	1999
c3		Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis: Designing a Mask Programmable Matrix for Sequential Circuits. VLSI 1999: 439-446
c2		Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak: Microelectronics Education Using WWW. MSE 1999: 43-44
c1		Ricardo Augusto da Luz Reis, Leandro Soares Indrusiak: VRML and Microelectronics Education. MSE 1999: 84-85

Coauthor Index

Colors in the list of coauthors

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