Lakshminarayanan Renganarayanan

	2012
j1		Lakshminarayanan Renganarayanan, DaeGon Kim, Michelle Mills Strout, Sanjay V. Rajopadhye: Parameterized loop tiling. ACM Trans. Program. Lang. Syst. 34(1): 3 (2012)
	2011
c13		Haibo Lin, Tao Liu, Lakshminarayanan Renganarayanan, Huoding Li, Tong Chen, Kevin O'Brien, Ling Shao: Automatic Loop Tiling for Direct Memory Access. IPDPS 2011: 479-489
	2010
c12		Uday Bondhugula, Oktay Günlük, Sanjeeb Dash, Lakshminarayanan Renganarayanan: A model for fusion and code motion in an automatic parallelizing compiler. PACT 2010: 343-352
c11		Haibo Lin, Tao Liu, Huoding Li, Tong Chen, Lakshminarayanan Renganarayanan, Kevin O'Brien, Ling Shao: DMATiler: revisiting loop tiling for direct memory access. PACT 2010: 559-560
c10		Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye, Charles Anderson, Alexandre E. Eichenberger, Kevin O'Brien: Automatic creation of tile size selection models. CGO 2010: 190-199
	2009
c9		Lakshminarayanan Renganarayanan, Uday Bondhugula, Salem Derisavi, Alexandre E. Eichenberger, Kevin O'Brien: Compact multi-dimensional kernel extraction for register tiling. SC 2009
	2008
c8		Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan: A domain specific interconnect for reconfigurable computing. LCTES 2008: 79-88
c7		Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye: Positivity, posynomials and tile size selection. SC 2008: 55
	2007
c6		Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, Sanjay V. Rajopadhye: Towards Optimal Multi-level Tiling for Stencil Computations. IPDPS 2007: 1-10
c5		Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay V. Rajopadhye, Michelle Mills Strout: Parameterized tiled loops for free. PLDI 2007: 405-414
c4		DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay V. Rajopadhye, Michelle Mills Strout: Multi-level tiling: M for the price of one. SC 2007: 51
	2005
c3		Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye: Combined ILP and Register Tiling: Analytical Model and Optimization Framework. LCPC 2005: 244-258
	2004
c2		Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye: A Geometric Programming Framework for Optimal Multi-Level Tiling. SC 2004: 18
	2003
c1		Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye: Switched Memory Architectures-Moving Beyond Systolic Arrays. ASAP 2003: 28-39

Coauthor Index

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