| 2004 | ||
|---|---|---|
| c8 | Carsten Reuter, Javier Martín-Langerwerf, Hans-Joachim Stolberg, Peter Pirsch: Performance Estimation of Streaming Media Applications for Reconfigurable Platforms. SAMOS 2004: 69-77 | |
| 2002 | ||
| c7 | Javier Martín-Langerwerf, Carsten Reuter, Holger Kropp, Peter Pirsch: Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications. IEEE International Workshop on Rapid System Prototyping 2002: 60-65 | |
| 2001 | ||
| j2 | Peter Pirsch, Carsten Reuter, Jens Peter Wittenburg, Mark Bernd Kulaczewski, Hans-Joachim Stolberg: Architecture Concepts for Multimedia Signal Processing. VLSI Signal Processing 29(3): 157-165 (2001) | |
| c6 | Jörn Gause, Carsten Reuter, Holger Kropp, Peter Y. K. Cheung, Wayne Luk: The Effect of FPGA Granularity on Video Codec Implementations. FCCM 2001: 287-288 | |
| 2000 | ||
| j1 | Carsten Reuter, Holger Kropp, Peter Pirsch: Rapid Prototyping von Videosignalverarbeitungsverfahren (Rapid Prototyping of Video Processing Schemes). it+ti - Informationstechnik und Technische Informatik 42(3): 5-9 (2000) | |
| c5 | Holger Kropp, Carsten Reuter: A Mapping Methodology for Code Trees onto LUT-Based FPGAs. FPL 2000: 221-229 | |
| 1999 | ||
| c4 | Holger Kropp, Carsten Reuter, Matthias Wiege, Tien-Toan Do, Peter Pirsch: An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes. FPL 1999: 333-338 | |
| 1998 | ||
| c3 | Tien-Toan Do, Holger Kropp, Carsten Reuter, Peter Pirsch: A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs. FPL 1998: 441-445 | |
| c2 | Holger Kropp, Carsten Reuter, Peter Pirsch: The Video and Image Processing Emulation System VIPES. International Workshop on Rapid System Prototyping 1998: 170-175 | |
| 1997 | ||
| c1 | Carsten Reuter, Markus Schwiegershausen, Peter Pirsch: Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms. ASAP 1997: 294-303 | |
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