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Joy Alinda Reyes
2010 – today
- 2010
[c2]Jestoni V. Zarsuela, Anastacia Alvarez, Joy Alinda Reyes: A Simulation of Cache Sub-banking and Block Buffering as Power Reduction Techniques for Multiprocessor Cache Design. UKSim 2010: 515-520
2000 – 2009
- 2008
[c1]Jennifer Jayme, Anastacia Ballesil, Joy Alinda Reyes: Analysis of Different AMBA-Based Bus Interconnection Schemes for ARM7 Multicore Environment. PDPTA 2008: 229-235
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last updated on 2012-12-02 21:22 CET by the dblp team



