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 | 2013 | |
|---|---|---|
| j22 |      | Reza Azarderakhsh, Arash Reyhani-Masoleh: Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases. IEEE Trans. Computers 62(4): 744-757 (2013) |
| j21 | | Reza Azarderakhsh, Arash Reyhani-Masoleh: High-Performance Implementation of Point Multiplication on Koblitz Curves. IEEE Trans. on Circuits and Systems 60-II(1): 41-45 (2013) |
| 2012 | ||
| j20 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM. IEEE Trans. Computers 61(8): 1165-1178 (2012) |
| j19 | | Reza Azarderakhsh, Arash Reyhani-Masoleh: Efficient FPGA Implementations of Point Multiplication on Binary Edwards and Generalized Hessian Curves Using Gaussian Normal Basis. IEEE Trans. VLSI Syst. 20(8): 1453-1466 (2012) |
| 2011 | ||
| j18 | | Reza Azarderakhsh, Arash Reyhani-Masoleh: Secure Clustering and Symmetric Key Establishment in Heterogeneous Wireless Sensor Networks. EURASIP J. Wireless Comm. and Networking 2011 (2011) |
| j17 | | Mohsen Bahramali, Jin Jiang, Arash Reyhani-Masoleh: A Fault Detection Scheme for the FPGA Implementation of SHA-1 and SHA-512 Round Computations. J. Electronic Testing 27(4): 517-530 (2011) |
| j16 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-Box and Inverse S-Box. IEEE Trans. Computers 60(9): 1327-1340 (2011) |
| j15 | | Arash Hariri, Arash Reyhani-Masoleh: Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields. IEEE Trans. Computers 60(9): 1341-1353 (2011) |
| j14 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A Lightweight High-Performance Fault Detection Scheme for the Advanced Encryption Standard Using Composite Fields. IEEE Trans. VLSI Syst. 19(1): 85-91 (2011) |
| j13 | | Arash Hariri, Arash Reyhani-Masoleh: Digit-Level Semi-Systolic and Systolic Structures for the Shifted Polynomial Basis Multiplication Over Binary Extension Fields. IEEE Trans. VLSI Syst. 19(11): 2125-2129 (2011) |
| c20 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Reliable Hardware Architectures for the Third-Round SHA-3 Finalist Grostl Benchmarked on FPGA Platform. DFT 2011: 325-331 |
| c19 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A High-Performance Fault Diagnosis Approach for the AES SubBytes Utilizing Mixed Bases. FDTC 2011: 80-87 |
| 2010 | ||
| j12 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Concurrent Structure-Independent Fault Detection Schemes for the Advanced Encryption Standard. IEEE Trans. Computers 59(5): 608-622 (2010) |
| c18 | | Reza Azarderakhsh, Arash Reyhani-Masoleh: A Modified Low Complexity Digit-Level Gaussian Normal Basis Multiplier. WAIFI 2010: 25-40 |
| 2009 | ||
| j11 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard. J. Electronic Testing 25(4-5): 225-245 (2009) |
| j10 | | Arash Hariri, Arash Reyhani-Masoleh: Bit-Serial and Bit-Parallel Montgomery Multiplication and Squaring over GF(2^m). IEEE Trans. Computers 58(10): 1332-1345 (2009) |
| c17 | | Christopher Kennedy, Arash Reyhani-Masoleh: High-speed CRC computations using improved state-space transformations. EIT 2009: 9-14 |
| c16 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A low-cost S-box for the Advanced Encryption Standard using normal basis. EIT 2009: 52-55 |
| 2008 | ||
| c15 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis. CHES 2008: 113-129 |
| c14 | | Arash Reyhani-Masoleh: A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases. CHES 2008: 300-314 |
| c13 | | Reza Azarderakhsh, Arash Reyhani-Masoleh, Zine-Eddine Abid: A Key Management Scheme for Cluster Based Wireless Sensor Networks. EUC (2) 2008: 222-227 |
| c12 | | Yuan Xue, Helmut Jürgensen, Reza Azarderakhsh, Arash Reyhani-Masoleh: Key Management for Wireless Sensor Networks Using Trusted Neighbors. EUC (2) 2008: 228-233 |
| c11 | | Arash Hariri, Arash Reyhani-Masoleh: Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields. WAIFI 2008: 103-116 |
| 2007 | ||
| c10 | | Arash Hariri, Arash Reyhani-Masoleh: Fault Detection Structures for the Montgomery Multiplication over Binary Extension Fields. FDTC 2007: 37-46 |
| c9 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: A Structure-independent Approach for Fault Detection Hardware Implementations of the Advanced Encryption Standard. FDTC 2007: 47-53 |
| 2006 | ||
| j9 | | Arash Reyhani-Masoleh: Efficient Algorithms and Architectures for Field Multiplication Using Gaussian Normal Bases. IEEE Trans. Computers 55(1): 34-47 (2006) |
| j8 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Fault Detection Architectures for Field Multiplication Using Polynomial Bases. IEEE Trans. Computers 55(9): 1089-1103 (2006) |
| c8 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Parity Prediction of S-Box for AES. CCECE 2006: 2357-2360 |
| c7 | | Mehran Mozaffari Kermani, Arash Reyhani-Masoleh: Parity-Based Fault Detection Architecture of S-box for Advanced Encryption Standard. DFT 2006: 572-580 |
| 2005 | ||
| j7 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Low Complexity Word-Level Sequential Normal Basis Multipliers. IEEE Trans. Computers 54(2): 98-110 (2005) |
| 2004 | ||
| j6 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Low Complexity Bit Parallel Architectures for Polynomial Basis Multiplication over GF(2^{m}). IEEE Trans. Computers 53(8): 945-959 (2004) |
| j5 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Efficient digit-serial normal basis multipliers over binary extension fields. ACM Trans. Embedded Comput. Syst. 3(3): 575-592 (2004) |
| j4 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Towards fault-tolerant cryptographic computations over finite fields. ACM Trans. Embedded Comput. Syst. 3(3): 593-613 (2004) |
| 2003 | ||
| j3 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: Efficient Multiplication Beyond Optimal Normal Bases. IEEE Trans. Computers 52(4): 428-439 (2003) |
| j2 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: Fast Normal Basis Multiplication Using General Purpose Processors. IEEE Trans. Computers 52(11): 1379-1390 (2003) |
| c6 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: Low Complexity Sequential Normal Basis Multipliers over GF(2m). IEEE Symposium on Computer Arithmetic 2003: 188-195 |
| c5 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: On Low Complexity Bit Parallel Polynomial Basis Multipliers. CHES 2003: 189-202 |
| 2002 | ||
| j1 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: A New Construction of Massey-Omura Parallel Multiplier over GF(2m). IEEE Trans. Computers 51(5): 511-520 (2002) |
| c4 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: Error Detection in Polynomial Basis Multipliers over Binary Extension Fields. CHES 2002: 515-528 |
| c3 | | Arash Reyhani-Masoleh, M. Anwar Hasan: Efficient digit-serial normal basis multipliers over GF(2/sup m/). ISCAS (5) 2002: 781-784 |
| 2001 | ||
| c2 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: Fast Normal Basis Multiplication Using General Purpose Processors. Selected Areas in Cryptography 2001: 230-244 |
| 2000 | ||
| c1 | | Arash Reyhani-Masoleh, M. Anwarul Hasan: On Efficient Normal Basis Multiplication. INDOCRYPT 2000: 213-224 |
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