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 | 2013 | |
|---|---|---|
| j12 |      | Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Möller, Leandro Soares Indrusiak, Gilles Sassatelli, Pascal Benoit, Manfred Glesner, Michel Robert, Fernando Moraes: Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embedded Comput. Syst. 12(3): 75 (2013) |
| 2012 | ||
| j11 | | Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, François Grize, Michel Robert: A Mobile Computing Framework for Pervasive Adaptive Platforms. IJDSN 2012 (2012) |
| j10 | | Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine: Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. VLSI Syst. 20(3): 573-577 (2012) |
| c64 | | Rémi Busseuil, Luciano Ost, Rafael Garibotti, Gilles Sassatelli, Michel Robert: Remote Execution in Distributed Memory MPSoC. FCCM 2012: 121-124 |
| 2011 | ||
| j9 | | Gabriel Marchesan Almeida, Rémi Busseuil, Luciano Ost, Florent Bruguier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip. Embedded Systems Letters 3(3): 77-80 (2011) |
| j8 | | Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard: Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. Microelectronics Journal 42(5): 718-732 (2011) |
| p1 | | Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini: An Introduction to Multi-Core System on Chip - Trends and Challenges. Multiprocessor System-on-Chip 2011: 1-21 |
| c63 | | Rémi Busseuil, Lyonel Barthe, Gabriel Marchesan Almeida, Luciano Ost, Florent Bruguier, Gilles Sassatelli, Pascal Benoit, Michel Robert, Lionel Torres: Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. ReConFig 2011: 357-362 |
| c62 | | Luciano Ost, Gabriel Marchesan Almeida, Marcelo Mandelli, Eduardo Wächter, Sameer Varyani, Gilles Sassatelli, Leandro Soares Indrusiak, Michel Robert, Fernando Moraes: Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling. ReCoSoC 2011: 1-8 |
| c61 | | Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Soares Indrusiak, Leandro Möller, Manfred Glesner, Gilles Sassatelli, Michel Robert, Fernando Moraes: Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. SBCCI 2011: 185-190 |
| 2010 | ||
| j7 | | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Nicolas Saint-Jean: Run-time mapping for dynamic reconfiguration management in embedded systems. IJES 4(3/4): 276-291 (2010) |
| c60 | | Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert: Differential Power Analysis enhancement with statistical preprocessing. DATE 2010: 1301-1304 |
| c59 | | Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. ReConFig 2010: 382-387 |
| c58 | | François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert: Spatial EM jamming: A countermeasure against EM Analysis? VLSI-SoC 2010: 105-110 |
| c57 | | Rémi Busseuil, Gabriel Marchesan Almeida, Luciano Ost, Sameer Varyani, Gilles Sassatelli, Michel Robert: Adaptation Strategies in Multiprocessors System on Chip. VLSI-SoC (Selected Papers) 2010: 233-257 |
| 2009 | ||
| j6 | | Gabriel Marchesan Almeida, Gilles Sassatelli, Pascal Benoit, Nicolas Saint-Jean, Sameer Varyani, Lionel Torres, Michel Robert: An Adaptive Message Passing MPSoC Framework. Int. J. Reconfig. Comp. 2009 (2009) |
| c56 | | Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, Michel Robert, Juan Manuel Moreno, Alessandro E. P. Villa, Eduardo Sanchez: A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications. AHS 2009: 415-422 |
| c55 | | Olivier Brousse, Jérémie Guillot, Thierry Gil, François Grize, Gilles Sassatelli, Juan Manuel Moreno, Jordi Madrenas, Alessandro E. P. Villa, Henri Volken, Michel Robert: JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. IEEE Congress on Evolutionary Computation 2009: 2070-2075 |
| c54 | | Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans: Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639 |
| c53 | | Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard: Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. PATMOS 2009: 266-275 |
| c52 | | Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert: Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC 2009: 135-155 |
| 2008 | ||
| c51 | | Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert: A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. DELTA 2008: 107-110 |
| c50 | | Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: Bio-inspiration helps computers: A new machine. FPL 2008: 697-698 |
| c49 |  | Olivier Brousse, Gilles Sassatelli, Thierry Gil, Yoann Guillemenet, Michel Robert, François Grize, Eduardo Sanchez, Yann Thoma, Andres Upegui, Juan Manuel Moreno, Jordi Madrenas: BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. GEM 2008: 115-121 |
| c48 | | Olivier Brousse, Gilles Sassatelli, Thierry Gil, Michel Robert, François Grize, Eduardo Sanchez, Andres Upegui, Yann Thoma: The Perplexus Programming Framework: Combining Bio-inspiration and Agent-Oriented Programming for the Simulation of Large Scale Complex Systems. ICES 2008: 402-407 |
| c47 | | Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert: MPI-Based Adaptive Task Migration Support on the HS-Scale System. ISVLSI 2008: 105-110 |
| c46 | | Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert: Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. ISVLSI 2008: 310-315 |
| c45 | | Bettina Rebaud, Marc Belleville, Christian Bernard, Zequin Wu, Michel Robert, Philippe Maurine, Nadine Azémard: Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. ISVLSI 2008: 316-321 |
| c44 | | Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans: Triple Rail Logic Robustness against DPA. ReConFig 2008: 415-420 |
| c43 | | Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert: Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198 |
| 2007 | ||
| c42 | | Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes: Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296 |
| c41 | | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes: A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8 |
| c40 | | Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. ISVLSI 2007: 21-28 |
| c39 | | Alin Razafindraibe, Michel Robert, Philippe Maurine: Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. PATMOS 2007: 340-351 |
| c38 | | Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert: HS Scale: A run-time adaptable MP-SoC architecture. ReCoSoC 2007: 39-46 |
| c37 | | Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert: Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. ICSAMOS 2007: 88-95 |
| c36 | | Alin Razafindraibe, Michel Robert, Philippe Maurine: Improvement of dual rail logic as a countermeasure against DPA. VLSI-SoC 2007: 270-275 |
| 2006 | ||
| c35 | | Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes: A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4 |
| c34 | | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker: Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI 2006: 251-256 |
| c33 | | Alin Razafindraibe, Michel Robert, Philippe Maurine: Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. PATMOS 2006: 634-644 |
| c32 | | Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert: A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC 2006: 220-224 |
| c31 | | Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin: Security evaluation of dual rail logic against DPA attacks. VLSI-SoC 2006: 181-186 |
| 2005 | ||
| j5 | | Alin Razafindraibe, Michel Robert, Philippe Maurine: Compact and Secured Primitives for the Design of Asynchronous Circuits. J. Low Power Electronics 1(1): 20-26 (2005) |
| j4 | | Blaise Conrard, Jean-Marc Thiriet, Michel Robert: Distributed system design based on dependability evaluation: a case study on a pilot thermal process. Rel. Eng. & Sys. Safety 88(1): 109-119 (2005) |
| j3 | | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny: Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Technique et Science Informatiques 24(6): 725-755 (2005) |
| c30 | | F. Gensolen, Guy Cathebras, Lionel Martin, Michel Robert: An Image Sensor with Global Motion Estimation for Micro Camera Module. ACIVS 2005: 713-721 |
| c29 | | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon: Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA 2005: 270 |
| c28 | | Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon: Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL 2005: 703-706 |
| c27 | | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon: Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS 2005 |
| c26 | | Alin Razafindraibe, Michel Robert, Marc Renaudin, Philippe Maurine: A Method to Design Compact Dual-rail Asynchronous Primitives. PATMOS 2005: 571-580 |
| c25 | | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 |
| c24 | | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes: Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 |
| c23 | | Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathebras, Gilles Sassatelli, Fernando Gehm Moraes: Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330 |
| 2004 | ||
| c22 | | Olivier Omedes, Michel Robert, Mohammed Ramdani: A flexibility aware budgeting for hierarchical flow timing closure. ICCAD 2004: 261-266 |
| c21 | | A. Landrault, Nadine Azémard, Philippe Maurine, Michel Robert, Daniel Auvergne: Design Optimization with Automated Cell Generation. PATMOS 2004: 722-731 |
| c20 | | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon: Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 |
| 2003 | ||
| c19 | | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny: A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 |
| c18 | | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon: Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 |
| c17 | | Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert: Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281 |
| 2002 | ||
| c16 | | A. Landrault, L. Pellier, A. Richard, C. Jay, Michel Robert, Daniel Auvergne: Transistor Level Synthesis Dedicated to Fast I.P. Prototyping. PATMOS 2002: 156-166 |
| c15 | | Christel-Loic Tisse, Lionel Martin, Lionel Torres, Michel Robert: Iris recognition system for person identification. PRIS 2002: 186-199 |
| e1 | | Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes (Eds.): SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01), December 3-5, 2001, Montpellier, France. IFIP Conference Proceedings 218, Kluwer 2002, isbn 1-4020-7148-5 |
| 2001 | ||
| c14 | | Camille Diou, Lionel Torres, Michel Robert: An embedded core for the 2D wavelet transform. ETFA (2) 2001: 179-186 |
| c13 | | Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy: Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC 2001: 63-74 |
| 2000 | ||
| c12 | | |
| 1999 | ||
| c11 | | Camille Diou, Lionel Torres, Michel Robert: Implementation of a Wavelet Transform Architecture for Image Processing. VLSI 1999: 101-112 |
| c10 | | Augusto Gallegos, Philippe Silvestre, Michel Robert, Daniel Auvergne: RF Interface Design Using Mixed-Mode Methodology. VLSI 1999: 326-333 |
| c9 | | S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres: Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI 1999: 407-414 |
| c8 | | Fernando Moraes, Michel Robert, Daniel Auvergne: A Virtual CMOS Library Approach for East Layout Synthesis. VLSI 1999: 415-426 |
| c7 | | |
| c6 | | Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon: Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping 1999: 87- |
| 1998 | ||
| j2 | | Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine: A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real-Time Imaging 4(3): 181-191 (1998) |
| 1996 | ||
| c5 | | Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon: Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 |
| 1995 | ||
| c4 | | Jean Michel Daga, Michel Robert, Daniel Auvergne: Delay modelling improvement for low voltage applications. EURO-DAC 1995: 216-221 |
| 1994 | ||
| c3 | | Michel Robert, P. Gorria, Johel Mitéran, S. Turgis: Design of a Real Time Geometric Classifier. EDAC-ETC-EUROASIC 1994: 656 |
| c2 | | Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne: Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44 |
| 1993 | ||
| j1 | | Denis Deschacht, Michel Robert, Nadine Azémard-Crestani, Daniel Auvergne: Post-layout timing simulation of CMOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(8): 1170-1177 (1993) |
| 1990 | ||
| c1 | | Denis Deschacht, P. Pinede, Michel Robert, Daniel Auvergne: Path runner: an accurate and fast timing analyser. EURO-DAC 1990: 529-533 |
Colors in the list of coauthors
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