| 2013 | ||
|---|---|---|
| c30 | Peyman Pouyan, Esteve Amat, Francesc Moll, Antonio Rubio: Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches. DATE 2013: 1303-1306 | |
| 2012 | ||
| j14 | Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González: Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. Integration 45(3): 246-252 (2012) | |
| j13 | Nivard Aymerich, Antonio Rubio: Fault-tolerant nanoscale architecture based on linear threshold gates with redundancy. Microprocessors and Microsystems - Embedded Hardware Design 36(5): 420-426 (2012) | |
| c29 | Carmen G. Almudéver, Antonio Rubio, Javier Martín-Martínez, Alberto Crespo-Yepes, Rosana Rodríguez, Montserrat Nafría: Shape-shifting digital hardware concept: Towards a new adaptive computing system. AHS 2012: 167-173 | |
| c28 | Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio: A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance. ICCD 2012: 472-477 | |
| c27 | Esteve Amat, A. Asenov, Ramon Canal, B. Cheng, J.-Ll. Cruz, Zoran Jaksic, Miguel Miranda, Antonio Rubio, Paul Zuber: Analysis of FinFET technology on memories. IOLTS 2012: 169 | |
| c26 | Peyman Pouyan, Esteve Amat, Antonio Rubio: Process variability-aware proactive reconfiguration technique for mitigating aging effects in nano scale SRAM lifetime. VTS 2012: 240-245 | |
| 2011 | ||
| j12 | Lancelot Garcia-Leyva, Dennis Andrade, Sergio Gómez, Antonio Calomarde, Francesc Moll, Antonio Rubio: New redundant logic design concept for high noise and low voltage scenarios. Microelectronics Journal 42(12): 1359-1369 (2011) | |
| j11 | Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera: TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies. Procedia CS 7: 148-149 (2011) | |
| c25 | Sergio Gómez, Francesc Moll, Antonio Rubio, Martin Elhøj, Guilherme Schlinker, Nigel Woolaway: Design Guidelines towards Compact Litho-Friendly Regular cells. ARCS Workshops 2011 | |
| c24 | Lancelot Garcia-Leyva, Antonio Calomarde, Francesc Moll, Antonio Rubio: A new probabilistic design methodology of nanoscale digital circuits. CONIELECOMP 2011: 190-193 | |
| c23 | Carmen Garcia, Antonio Rubio: Manufacturing variability analysis in Carbon Nanotube Technology: A comparison with bulk CMOS in 6T SRAM scenario. DDECS 2011: 249-254 | |
| c22 | Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González: Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. ACM Great Lakes Symposium on VLSI 2011: 277-282 | |
| c21 | Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: Dynamic fine-grain body biasing of caches with latency and leakage 3T1D-based monitors. ICCD 2011: 332-338 | |
| c20 | Nivard Aymerich, A. Asenov, A. Brown, Ramon Canal, B. Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, I. Vatajelu, Xavier Vera, X. Wang, Paul Zuber: New reliability mechanisms in memory design for sub-22nm technologies. IOLTS 2011: 111-114 | |
| c19 | Dennis Andrade, Antonio Rubio, Antonio Calomarde, Sorin Dan Cotofana: Analysis of delay mismatching of digital circuits caused by common environmental fluctuations. ISCAS 2011: 2585-2588 | |
| c18 | Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González: Design of complex circuits using the Via-Configurable transistor array regular layout fabric. SoCC 2011: 166-169 | |
| 2010 | ||
| c17 | Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability. DATE 2010: 417-422 | |
| c16 | Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio: MODEST: a model for energy estimation under spatio-temporal variability. ISLPED 2010: 129-134 | |
| c15 | Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González: VCTA: A Via-Configurable Transistor Array regular fabric. VLSI-SoC 2010: 335-340 | |
| 2009 | ||
| j10 | Dennis Andrade, Ferran Martorell, Arindam Calomarde, Francesc Moll, Antonio Rubio: A new compensation mechanism for environmental parameter fluctuations in CMOS digital ICs. Microelectronics Journal 40(6): 952-957 (2009) | |
| 2008 | ||
| j9 | Ferran Martorell, Antonio Rubio: Cell architecture for nanoelectronic design. Microelectronics Journal 39(8): 1041-1050 (2008) | |
| c14 | Antonio Rubio: The Role of Test in Circuits Built with Unreliable Components. European Test Symposium 2008: 3 | |
| c13 | Eduardo Aldrete-Vidrio, M. Amine Salhi, Josep Altet, Stéphane Grauby, Diego Mateo, H. Michel, L. Clerjaud, Jean-Michel Rampnoux, Antonio Rubio, Wilfrid Claeys, Stefan Dilhaire: Using Temperature as Observable of the Frequency Response of RF CMOS Amplifiers. European Test Symposium 2008: 47-52 | |
| c12 | Francesc Moll, Joan Figueras, Antonio Rubio: Data Dependence of Delay Distribution for a Planar Bus. PATMOS 2008: 409-418 | |
| 2007 | ||
| c11 | ||
| 2006 | ||
| c10 | Arindam Calomarde, Diego Mateo, Antonio Rubio: High level spectral-based analysis of power consumption in DSPs systems. ISCAS 2006 | |
| 2005 | ||
| j8 | Arindam Calomarde, Antonio Rubio, Jordi Saludes: Selective Clock-Gating for Low-Power Synchronous Counters. J. Low Power Electronics 1(3): 217-225 (2005) | |
| j7 | Miguel A. Méndez, José Luis González, Diego Mateo, Antonio Rubio: An investigation on the relation between digital circuitry characteristics and power supply noise spectrum in mixed-signal CMOS integrated circuits. Microelectronics Journal 36(1): 77-84 (2005) | |
| c9 | Johan Lambie, Francesc Moll Echeto, José Luis González, Antonio Rubio: Asynchronous pulse logic cell for threshold logic and Boolean networks. ISCAS (1) 2005: 460-463 | |
| 2004 | ||
| j6 | Josep Altet, Jean-Michel Rampnoux, Jean-Christophe Batsale, Stefan Dilhaire, Antonio Rubio, Wilfrid Claeys, Stéphane Grauby: Applications of temperature phase measurements to IC testing. Microelectronics Reliability 44(1): 95-103 (2004) | |
| c8 | Josep Altet, Antonio Rubio, M. Amine Salhi, J. L. Gálvez, Stefan Dilhaire, Ashish Syal, André Ivanov: Sensing temperature in CMOS circuits for Thermal Testing. VTS 2004: 179-184 | |
| 2002 | ||
| j5 | Xavier Aragonès, José Luis González, Francesc Moll, Antonio Rubio: Noise Generation and Coupling Mechanisms in Deep-Submicron ICs. IEEE Design & Test of Computers 19(5): 27-35 (2002) | |
| 2000 | ||
| c7 | Josep Altet, Antonio Rubio, E. Schaub, Stefan Dilhaire, Wilfrid Claeys: Thermal Testing: Fault Location Strategies. VTS 2000: 189-194 | |
| 1999 | ||
| j4 | Josep Altet, Antonio Rubio, Wilfrid Claeys, Stefan Dilhaire, E. Schaub, Hideo Tamamoto: Differential Thermal Testing: An Approach to its Feasibility. J. Electronic Testing 14(1-2): 57-66 (1999) | |
| 1997 | ||
| c6 | Josep Altet, Antonio Rubio, Hideo Tamamoto: Analysis of the Feasibility of Dynamic Thermal Testing in Digital Circuits. Asian Test Symposium 1997: 149-154 | |
| c5 | Josep Altet, Antonio Rubio: Differential Sensing Strategy for Dynamic Thermal Testing of ICs. VTS 1997: 434-439 | |
| 1995 | ||
| j3 | Miquel Roca, Antonio Rubio: Current testability analysis of feedback bridging faults in CMOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1299-1305 (1995) | |
| c4 | Douglas Reed, Jason Doege, Antonio Rubio: Improving Board and System Test: A Proposal to Integrate Boundary Scan and IDDQ. ITC 1995: 577-585 | |
| c3 | J. A. Segura, Miquel Roca, Diego Mateo, Antonio Rubio: An approach to dynamic power consumption current testing of CMOS ICs. VTS 1995: 95-100 | |
| 1994 | ||
| j2 | Víctor H. Champac, Antonio Rubio, Joan Figueras: Electrical model of the floating gate defect in CMOS ICs: implications on IDDQ testing. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 359-369 (1994) | |
| j1 | Antonio Rubio, Noriyoshi Itazaki, Xiaole Xu, Kozo Kinoshita: An approach to the analysis and detection of crosstalk faults in digital VLSI circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 387-395 (1994) | |
| c2 | ||
| 1993 | ||
| c1 | Víctor H. Champac, Antonio Rubio, Joan Figueras: Analysis of the Floating Gate Defect in CMOS. DFT 1993: 101-108 | |
Colors in the list of coauthors
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