Howard Sachs Coauthor index pubzone.org

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DBLP keys2007
j3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
John Kubiatowicz, Howard Sachs: Guest Editors' Introduction: Hot Chips 18. IEEE Micro 27(2): 7-9 (2007)
2003
c2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Howard Sachs: A New High Performance Embedded "Hard Core" Vector DSP Architecture for Multimedia Applications. ESTImedia 2003: 2-4
1999
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Mark Birnbaum, Howard Sachs: How VSIA Answers the SOC Dilemma. IEEE Computer 32(6): 42-50 (1999)
1995
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Siamak Arya, Howard Sachs, Sreeram Duvvuru: An architecture for high instruction level parallelism. HICSS (1) 1995: 153-162
1989
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Walter Hollingsworth, Howard Sachs, Alan Jay Smith: The Clipper Processor: Instruction Set Architecture and Implementation. Commun. ACM 32(2): 200-219 (1989)

Coauthor Index

1Siamak Arya
[c1]
2Mark Birnbaum
[j2]
3Sreeram Duvvuru
[c1]
4Walter Hollingsworth
[j1]
5John Kubiatowicz
[j3]
6Alan Jay Smith
[j1]

Colors in the list of coauthors

Last update Mon May 20 07:34:14 2013 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page