Pascal Sainrat

Roman Bourgade, Christine Rochange, Pascal Sainrat: Predictable Two-Level Bus Arbitration for Heterogeneous Task Sets. ARCS 2013: 341-351

Mike Gerdes, Florian Kluge, Theo Ungerer, Christine Rochange, Pascal Sainrat: Time analysable synchronisation techniques for parallelised hard real-time applications. DATE 2012: 671-676

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer: RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011)

Pascal Sainrat: Éditorial. Technique et Science Informatiques 30(9): 1033-1034 (2011)

Roman Bourgade, Christine Rochange, Pascal Sainrat: Predictable bus arbitration schemes for heterogeneous time-critical workloads running on multicore processors. ETFA 2011: 1-4

Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische: Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010)

Jonathan Barre, Christine Rochange, Pascal Sainrat: Architecture d'un processeur multiflot orienté temps-réel. Technique et Science Informatiques 29(2): 157-178 (2010)

Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel: Experimentation of WCET computation on both ends of automotive processor range. EDCC-CARS 2010: 67-70

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer: RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201

Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat: OTAWA: An Open Toolbox for Adaptive WCET Analysis. SEUS 2010: 35-46

Christine Rochange, Armelle Bonenfant, Pascal Sainrat, Mike Gerdes, Julian Wolf, Theo Ungerer, Zlatko Petrov, Frantisek Mikulu: WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core. WCET 2010: 90-100

Christine Rochange, Pascal Sainrat: A Context-Parameterized Model for Static Analysis of Execution Times. T. HiPEAC 2: 222-241 (2009)

Jonathan Barre, Christine Rochange, Pascal Sainrat: A Predictable Simultaneous Multithreading Scheme for Hard Real-Time. ARCS 2008: 161-172

Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat: Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation. RTCSA 2008: 161-166

Clément Ballabriga, Hugues Cassé, Pascal Sainrat: An improved approach for set-associative instruction cache partial analysis. SAC 2008: 360-367

Jonathan Barre, Christine Rochange, Pascal Sainrat: An architecture for the simultaneous execution of hard real-time threads. ICSAMOS 2008: 18-24

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun: Inter-task WCET computation for a-way instruction caches. SIES 2008: 169-176

Niklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan: WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis. WCET 2008

Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam: High-Performance Embedded Architecture and Compilation Roadmap. T. HiPEAC 1: 5-29 (2007)

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada: Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis. SIES 2007: 25-32

Taewhan Kim, Pascal Sainrat, Steven S. Lumetta, Nacho Navarro (Eds.): Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007. ACM 2007

Jonathan Barre, Cédric Landet, Christine Rochange, Pascal Sainrat: Modeling Instruction-Level Parallelism for WCET Evaluation. RTCSA 2006: 61-67

Djemai Kebbal, Pascal Sainrat: Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis. WCET 2006

Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun, Marianne De Michiel: PapaBench: a Free Real-Time Benchmark. WCET 2006

Christine Rochange, Pascal Sainrat: Régulation du flot d'instructions pour des processeurs orientés temps réel. Technique et Science Informatiques 24(8): 963-989 (2005)

Christine Rochange, Pascal Sainrat: A time-predictable execution mode for superscalar pipelines with instruction prescheduling. Conf. Computing Frontiers 2005: 307-314

Claire Burguière, Christine Rochange, Pascal Sainrat: A Case for Static Branch Prediction in Real-Time Systems. RTCSA 2005: 33-38

Antoine Colin, Isabelle Puaut, Christine Rochange, Pascal Sainrat: Calcul de majorants de pire temps d'exécution : état de l'art. Technique et Science Informatiques 22(5): 651-677 (2003)

Thierry Haquin, Philippe Reynes, Christine Rochange, Pascal Sainrat: Optimisations du chargement des instructions. Technique et Science Informatiques 22(6): 689-711 (2003)

Christine Rochange, Pascal Sainrat: Towards Designing WCET-Predictable Processors. WCET 2003: 87-90

Hugues Cassé, L. Féraud, Christine Rochange, Pascal Sainrat: Une approche pour réduire la complexité du flot de contrôle dans les programmes C. Technique et Science Informatiques 21(7): 1009-1032 (2002)

Hugues Cassé, L. Féraud, Christine Rochange, Pascal Sainrat: Using the abstract interpretation technique for static pointer analysis. SIGARCH Computer Architecture News 27(1): 47-50 (1999)

Pascal Sainrat, Mateo Valero: Instruction-Level Parallelism and Uniprocessor Architecture - Introduction. Euro-Par 1999: 1241-1242

André Seznec, Stéphan Jourdan, Pascal Sainrat, Pierre Michaud: Multiple-Block Ahead Branch Predictors. ASPLOS 1996: 116-127

Stéphan Jourdan, Pascal Sainrat, Daniel Litaize: Exploring Configurations of Functional Units in an Out-of-Order Superscalar Processor. ISCA 1995: 117-125

Stéphan Jourdan, Pascal Sainrat, Daniel Litaize: An investigation of the performance of various instruction-issue buffer topologies. MICRO 1995: 279-284

Christine Rochange, Pascal Sainrat, Daniel Litaize: Performance of M3S for the SOR algorithm. PARLE 1993: 676-679

Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat: Towards a Shared-Memory Massively Parallel Multiprocessor. ISCA 1992: 70-79

Pascal Sainrat, Abdelaziz Mzoughi, Christine Rochange, Daniel Litaize: The Design of the M3S: A Multiported Shared-Memory Multiprocessor. SC 1992: 326-335

Daniel Litaize, Fatimazhra Elkhlifi, Omar Hammami, Mustapha Lalam, Abdelaziz Mzoughi, Pascal Sainrat, Jean-Claude Salinier: Serial Multiport Memory Multiprocessors. PARLE (1) 1989: 34-51