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Hiroshi Saito
2010 – today
- 2013
[j26]Minoru Iizuka, Naohiro Hamada, Hiroshi Saito: An ASIC Design Support Tool Set for Non-pipelined Asynchronous Circuits with Bundled-Data Implementation. IEICE Transactions 96-C(4): 482-491 (2013)- 2012
- [j25]Naohiro Hamada, Hiroshi Saito: Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data Implementation. IEICE Transactions 95-C(4): 506-515 (2012)
- [j24]Hiroshi Saito, Shinsuke Shimogawa, Sadaharu Tanaka, Shigeo Shioda: Estimating Parameters of Multiple Heterogeneous Target Objects Using Composite Sensor Nodes. IEEE Trans. Mob. Comput. 11(1): 125-138 (2012)
- [c34]Hiroshi Saito: Machine-to-Machine communications as a new revenue source of network operators. WPMC 2012: 100-102
- 2011
- [j23]Hiroshi Saito, Sadaharu Tanaka, Shigeo Shioda: Parameter Estimation for Non-convex Target Object Using Networked Binary Sensors. IEICE Transactions 94-D(4): 772-785 (2011)
- [c33]Naohiro Hamada, Hiroshi Saito: Integration of behavioral synthesis and floorplanning for asynchronous circuits with bundled-data implementation. ACM Great Lakes Symposium on VLSI 2011: 157-162
- [c32]Minoru Iizuka, Naohiro Hamada, Hiroshi Saito, Ryoichi Yamaguchi, Minoru Yoshinaga: A tool set for the design of asynchronous circuits with bundled-data implementation. ICCD 2011: 78-83
- 2010
- [j22]Hiroshi Saito: Networked Movable Fuel-Supply Stations for Vehicles and Its Performance. IEICE Transactions 93-B(4): 982-992 (2010)
- [j21]Stephan Wanke, Hiroshi Saito, Yutaka Arakawa, Shinsuke Shimogawa: User Location in Picocells -- A Paging Algorithm Derived from Measured Data. IEICE Transactions 93-B(9): 2291-2298 (2010)
- [c31]Hiroshi Saito, Naohiro Hamada, Tomohiro Yoneda, Takashi Nanya: A floorplan method for asynchronous circuits with bundled-data implementation on FPGAs. ISCAS 2010: 925-928
- [c30]Hiroshi Saito, Sadaharu Tanaka, Shigeo Shioda: Estimating Parameters of Non-convex Target Object Using Networked Binary Sensors. SUTC/UMC 2010: 146-154
2000 – 2009
- 2009
- [j20]Junko Harada, Shigeo Shioda, Hiroshi Saito: Path coverage properties of randomly deployed sensors with finite data-transmission ranges. Computer Networks 53(7): 1014-1026 (2009)
- [j19]
- [c29]Hiroshi Saito, Shinsuke Shimogawa, Shigeo Shioda, Junko Harada: Shape Estimation Using Networked Binary Sensors. INFOCOM 2009: 2901-2905
- 2008
- [j18]Hiroshi Saito, Shigeo Shioda, Junko Harada: Application of Insensitivity Analysis of Coverage Processes to Wireless Sensor Networks. IEICE Transactions 91-B(12): 3937-3944 (2008)
- [c28]Naohiro Hamada, Yuuki Shiga, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya: A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper). ACSD 2008: 50-55
- [c27]Junko Harada, Shigeo Shioda, Hiroshi Saito: Path Coverage Property of Randomly Deployed Sensor Networks with Finite Communication Ranges. ICC 2008: 2221-2227
- [c26]Hiroshi Saito, Shigeo Shioda, Junko Harada: Shape and size estimation using stochastically deployed networked sensors. SMC 2008: 2919-2926
- 2007
- [j17]Hiroshi Saito, Naohiro Hamada, Nattha Jindapetch, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya: Scheduling Methods for Asynchronous Circuits with Bundled-Data Implementations Based on the Approximation of Start Times. IEICE Transactions 90-A(12): 2790-2799 (2007)
- [c25]Takao Konishi, Naohiro Hamada, Hiroshi Saito: A Control Circuit Synthesis Method for Asynchronous Circuits in Bundled-Data Implementation. CIT 2007: 847-852
- [c24]Hiroshi Saito, Koichi Takasugi: Recent Developments in Wide Area Ubiquitous Network Research. ISADS 2007: 503-507
- 2006
- [j16]Hiroshi Saito: Performance Analysis of Combined Vehicular Communication. IEICE Transactions 89-B(5): 1486-1494 (2006)
- [c23]Hiroshi Saito, Nattha Jindapetch, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya: ILP-based Scheduling for Asynchronous Circuits in Bundled-Data Implementation. CIT 2006: 172
- [c22]Takeshi Matsumoto, Hiroshi Saito, Masahiro Fujita: Equivalence Checking of C Programs by Locally Performing Symbolic Simulation on Dependence Graphs. ISQED 2006: 370-375
- 2005
- [j15]Toshiaki Tsuchiya, Hiroshi Saito: Impact of Protocols and Network Configuration on Node-Level Availability in Sensor Networks. IEICE Transactions 88-B(3): 981-990 (2005)
- [j14]Toshiaki Tsuchiya, Hiroshi Saito: Usage of Network-Level Dynamic Priority and Its Comparison with Static Priority. IEICE Transactions 88-B(4): 1549-1558 (2005)
- [j13]Takeshi Matsumoto, Hiroshi Saito, Masahiro Fujita: An Equivalence Checking Method for C Descriptions Based on Symbolic Simulation with Textual Differences. IEICE Transactions 88-A(12): 3315-3323 (2005)
- 2003
- [c21]Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya: Logic optimization for asynchronous speed independent controllers using transduction method. ASP-DAC 2003: 197-202
- [c20]Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya: Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. ASP-DAC 2003: 816-819
- [c19]Hiroshi Saito, Euiseok Kim, Nattha Sretasereekul, Masashi Imai, Hiroshi Nakamura, Takashi Nanya: Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions. ASYNC 2003: 184-195
- [c18]Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya: Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. DATE 2003: 10276-10281
- [c17]Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, Kenshu Seto, Thanyapat Sakunkonchak, Yoshihisa Kojima: Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies. HICSS 2003: 279
- [c16]Nattha Sretasereekul, Hiroshi Saito, Masashi Imai, Euiseok Kim, Metehan Özcan, K. Thongnoo, Hiroshi Nakamura, Takashi Nanya: A zero-time-overhead asynchronous four-phase controller. ISCAS (5) 2003: 205-208
- [c15]Hiroshi Saito, Euiseok Kim, Masashi Imai, Nattha Sretasereekul, Hiroshi Nakamura, Takashi Nanya: Control signal sharing of asynchronous circuits using datapath delay information. ISCAS (5) 2003: 617-620
- [c14]Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita: Engineering Changes in Field Modifiable Architectures. MEMOCODE 2003: 87-94
- 2002
- [j12]Saeed Shiry Ghidary, Yasushi Nakata, Hiroshi Saito, Motofumi Hattori, Toshi Takamori: Multi-Modal Interaction of Human and Home Robot in the Context of Room Map Generation. Auton. Robots 13(2): 169-184 (2002)
- [c13]Satoshi Komatsu, Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto, Masahiro Fujita: Field modifiable architecture with FPGAs and its design methodology. FPT 2002: 382-385
- [c12]Hiroshi Saito, Takaya Ogawa, Thanyapat Sakunkonchak, Masahiro Fujita, Takashi Nanya: An equivalence checking methodology for hardware oriented C-based specifications. HLDVT 2002: 139-144
- [c11]Yoshihisa Kojima, Hiroshi Saito, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita: Field Modifiable Architecture and its Design Methodology: System Design Without Logic Synthesis. IWLS 2002: 103-108
- [c10]Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya: Logic Optimization for Asynchronous SI Controllers using Transduction Method. IWLS 2002: 245-250
- [c9]Hiroshi Saito, Alex Kondratyev, Takashi Nanya: Design of Asynchronous Controllers with Delay Insensitive Interface. VLSI Design 2002: 93-98
- 2001
- [c8]Saeed Shiry Ghidary, Yasushi Nakata, Hiroshi Saito, Motofumi Hattori, Toshi Takamori: Multi-modal human robot interaction for map generation. IROS 2001: 2246-2251
- 2000
- [j11]
- [c7]Hiroshi Saito, Hisaki Ohara, Daisuke Satoh: Development of Real-Time Simulator Using Traffic Monitoring. ICC (1) 2000: 195-199
- [c6]Hiroshi Saito, Toshiaki Tsuchiya, Gyula Marosi, Gyorgy Horvath, Peter Tatai, Shoichiro Asano: Real-Time Cell Arrival Sequence Estimation and Simulator for IP/ATM Networks. NETWORKING 2000: 410-422
1990 – 1999
- 1999
- [c5]Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev: What is the cost of delay insensitivity? ICCAD 1999: 316-323
- [c4]
- 1997
- [c3]Shigeo Shioda, Hiroshi Saito: Real-Time Cell Loss Ratio Estimation and its Applications to ATM Traffic Controls. INFOCOM 1997: 1072-1079
- 1996
- [j10]Hiroshi Saito: Resource Management and Charging in ATM Networks. Computer Networks and ISDN Systems 28(5): 641-644 (1996)
- [c2]Shin-ichi Nakagawa, Yuka Kato, Satoshi Nakai, Kazuo Ogura, Hiroshi Saito: Self-sizing network operation systems in ATM networks. NOMS 1996: 563-572
- 1995
- [c1]
- 1994
- [j9]Hiroshi Saito, Takuya Asaka: Traffic Aspect of Personal Telecommunications in Intelligent Networks. Computer Networks and ISDN Systems 26(9): 1089-1099 (1994)
- 1992
- [j8]Hiroshi Saito: Call admission control in an ATM network using upper bound of cell loss probability. IEEE Transactions on Communications 40(9): 1512-1521 (1992)
- 1991
- [j7]Hiroshi Saito, Masatoshi Kawarasaki, Hiroshi Yamada: An Analysis of Statistical Multiplexing in an ATM Transport Network. IEEE Journal on Selected Areas in Communications 9(3): 359-367 (1991)
- [j6]Hiroshi Saito, Kohei Shiomoto: Dynamic Call Admission Control in ATM Networks. IEEE Journal on Selected Areas in Communications 9(7): 982-989 (1991)
- 1990
- [j5]Konosuke Kawashima, Hiroshi Saito: Teletraffic Issues in ATM Networks. Computer Networks and ISDN Systems 20(1): 369-375 (1990)
- [j4]
- [j3]Hiroshi Saito: Optimal queueing discipline for real-time traffic at ATM switching nodes. IEEE Transactions on Communications 38(12): 2131-2136 (1990)
1980 – 1989
- 1989
- [j2]Hiroshi Saito: Optimal Control of Variable Rate Coding in Integrated Voice/Data Packet Networks. Perform. Eval. 10(2): 115-128 (1989)
- 1988
- [j1]Hiroshi Saito: Analysis of Measured Loss Probability and Grade-of-Service in ISDNs. Computer Networks 15: 87-96 (1988)
Coauthor Index
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last updated on 2013-06-19 21:58 CEST by the dblp team