Noboru Sakimura

Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu: Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating. ISSCC 2013: 194-195

Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi: A non-volatile reconfigurable offloader for wireless sensor nodes. SIGARCH Computer Architecture News 40(5): 87-92 (2012)

Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Hiroaki Honjo, Tadahiko Sugibayashi, Hiroki Koike, Takashi Ohsawa, Shunsuke Fukami, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh: High-speed simulator including accurate MTJ models for spintronics integrated circuit design. ISCAS 2012: 1971-1974

Makoto Miyamura, Shogo Nakaya, Munehiro Tada, Toshitsugu Sakamoto, Koichiro Okamoto, Naoki Banno, Shinji Ishida, Kimihiko Ito, Hiromitsu Hada, Noboru Sakimura, Tadahiko Sugibayashi, Masato Motomura: Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS. ISSCC 2011: 228-229

Ryusuke Nebashi, Noboru Sakimura, Tadahiko Sugibayashi, Naoki Kasai: Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros. IEICE Transactions 92-C(4): 417-422 (2009)

Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Shinsaku Saito, Yuichi Ito, Sadahiko Miura, Yuko Kato, Kaoru Mori, Yasuaki Ozaki, Yosuke Kobayashi, Norikazu Ohshima, Keizo Kinoshita, Tetsuhiro Suzuki, Kiyokazu Nagahara, Nobuyuki Ishiwata, Katsumi Suemitsu, Shunsuke Fukami, Hiromitsu Hada, Tadahiko Sugibayashi, Naoki Kasai: A 90nm 12ns 32Mb 2T1MTJ MRAM. ISSCC 2009: 462-463

Takeshi Honda, Noboru Sakimura, Tadahiko Sugibayashi, Naoki Kasai, Hiromitsu Hada, Shuichi Tahara: Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode. IEICE Transactions 90-C(2): 531-535 (2007)

Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura, Shuichi Tahara, Naoki Kasai: MRAM Applications Using Unlimited Write Endurance. IEICE Transactions 90-C(10): 1936-1940 (2007)