Marcelino Bicho Dos Santos
List of publications from the DBLP Bibliography Server - FAQ
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 | 2013 | |
|---|---|---|
| j16 |      | Jorge O. M. Esteves, João Pereira, Júlio Paisana, Marcelino B. Santos: Ultra low power capless LDO with dynamic biasing of derivative feedback. Microelectronics Journal 44(2): 94-102 (2013) |
| 2012 | ||
| j15 | | Jackson Pachito, Celestino V. Martins, B. Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Aging-Aware Power or Frequency Tuning With Predictive Fault Detection. IEEE Design & Test of Computers 29(5): 27-36 (2012) |
| c43 | | Jackson Pachito, Celestino V. Martins, Jorge Semião, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: The influence of clock-gating on NBTI-induced delay degradation. IOLTS 2012: 61-66 |
| 2011 | ||
| j14 | | R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications. J. Low Power Electronics 7(4): 562-572 (2011) |
| c42 | | Carlos O. Moreira, Fernando A. Silva, Sonia Ferreira Pinto, Marcelino B. Santos: Digital LQR control with Kalman Estimator for DC-DC Buck converter. EUROCON 2011: 1-4 |
| c41 | | Jorge O. M. Esteves, Tiago H. Moita, Carlos B. Almeida, Marcelino B. Santos: ICT: Interface software for the characterization and test of mixed-signal power cores. IOLTS 2011: 202-205 |
| c40 | | Celestino V. Martins, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. VTS 2011: 203-208 |
| 2010 | ||
| c39 | | Julio César Vázquez, Víctor H. Champac, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Programmable aging sensor for automotive safety-critical applications. DATE 2010: 618-621 |
| c38 | | Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Predictive error detection by on-line aging monitoring. IOLTS 2010: 9-14 |
| c37 | | Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, João Paulo Teixeira: Low-sensitivity to process variations aging sensor for automotive safety-critical applications. VTS 2010: 238-243 |
| 2009 | ||
| j13 | | Angelo Monteiro, Marcelino B. Santos, Alexandre Neves, Nuno Dias: Noise Minimization for Low Power Bandgap Reference and Low Dropout Regulator Cores. J. Low Power Electronics 5(2): 206-222 (2009) |
| j12 | | Nuno Dias, Marcelino B. Santos, Angelo Monteiro, Pedro Braga, Alexandre Neves: Gate Driver Voltage Optimization for Multi-Mode Low Power DC-DC Conversion. J. Low Power Electronics 5(2): 241-254 (2009) |
| c36 | | Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Built-in aging monitoring for safety-critical applications. IOLTS 2009: 9-14 |
| c35 | | Jose Rocha, Nuno Dias, Angelo Monteiro, Alexandre Neves, Gabriel Santos, Marcelino B. Santos, João Paulo Teixeira: Controllability and observability in mixed signal cores. IOLTS 2009: 198-200 |
| c34 | | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. IOLTS 2009: 223-228 |
| 2008 | ||
| j11 | | Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira: Signal Integrity Enhancement in Digital Circuits. IEEE Design & Test of Computers 25(5): 452-461 (2008) |
| j10 | | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Paulo J. Teixeira: Time Management for Low-Power Design of Digital Systems. J. Low Power Electronics 4(3): 410-419 (2008) |
| c33 | | Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37 |
| c32 | | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. IOLTS 2008: 227-232 |
| c31 | | Nuno Dias, Marcelino B. Santos, Floriberto Lima, Beatriz Borges, Júlio Paisana: Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization. PATMOS 2008: 258-267 |
| 2007 | ||
| j9 | | Marcelino B. Santos, João Paulo Teixeira: Functional-oriented mask-based built-in self-test. IET Computers & Digital Techniques 1(5): 491-498 (2007) |
| c30 |  | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300 |
| c29 | | Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311 |
| c28 | | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172 |
| c27 | | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212 |
| 2006 | ||
| c26 | | José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Teixeira: Probabilistic Testability Analysis and DFT Methods at RTL. DDECS 2006: 216-217 |
| c25 | | F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. DDECS 2006: 279-284 |
| c24 | | José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João C. Teixeira: DFT and Probabilistic Testability Analysis at RTL. HLDVT 2006: 41-47 |
| 2005 | ||
| j8 | | D. Barros Júnior, Marcial Jesús Rodríguez-Irago, Marcelino B. Santos, Isabel C. Teixeira, Fabian Vargas, João Paulo Teixeira: Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip. J. Electronic Testing 21(4): 349-363 (2005) |
| c23 | | Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. IOLTS 2005: 281-286 |
| 2004 | ||
| j7 | | Abilio Parreira, João Paulo Teixeira, Marcelino B. Santos: Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs. Computers and Artificial Intelligence 23(5): 537-556 (2004) |
| j6 | | Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, L. Balado, Joan Figueras: On High-Quality, Low Energy Built-In Self Test Preparation at RT-Level. J. Electronic Testing 20(4): 345-355 (2004) |
| c22 | | José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Teixeira: A Probabilistic Method for the Computation of Testability of RTL Constructs. DATE 2004: 176-181 |
| c21 | | |
| c20 | | Daniel Barros Jr., Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Modeling and Simulation of Time Domain Faults in Digital Systems. IOLTS 2004: 5-10 |
| 2003 | ||
| c19 | | Marcelino B. Santos, José M. Fernandes, Isabel C. Teixeira, João Paulo Teixeira: RTL Test Pattern Generation for High Quality Loosely Deterministic BIST. DATE 2003: 10994-10999 |
| c18 | | Abilio Parreira, João Paulo Teixeira, A. Pantelimon, Marcelino B. Santos, José T. de Sousa: Fault Simulation Using Partially Reconfigurable Hardware. FPL 2003: 839-848 |
| c17 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Property Coverage for Quality Assessment of Fault Tolerant or Fail Safe Systems. IOLTS 2003: 164-165 |
| 2002 | ||
| j5 | | Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage. J. Electronic Testing 18(2): 179-187 (2002) |
| j4 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System. J. Electronic Testing 18(3): 285-294 (2002) |
| c16 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling. DFT 2002: 216-224 |
| c15 | | Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras: RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. ITC 2002: 814-823 |
| 2001 | ||
| j3 | | Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: RTL-Based Functional Test Generation for High Defects Coverage in Digital Systems. J. Electronic Testing 17(3-4): 311-319 (2001) |
| c14 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro. IOLTW 2001: 197-201 |
| c13 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Implicit functionality and multiple branch coverage (IFMB): a testability metric for RT-level. ITC 2001: 377-385 |
| 2000 | ||
| j2 | | Salvador Manich, A. Gabarró, M. Lopez, Joan Figueras, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Paulo J. Teixeira, Marcelino B. Santos: Low Power BIST by Filtering Non-Detecting Vectors. J. Electronic Testing 16(3): 193-202 (2000) |
| c12 | | Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Quality of Electronic Design: From Architectural Level to Test Coverage. ISQED 2000: 197- |
| 1999 | ||
| c11 | | Marcelino B. Santos, João Paulo Teixeira: Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL. DATE 1999: 549- |
| c10 | | Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, Paulo J. Teixeira, Marcelino B. Santos: Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. ISCAS (1) 1999: 110-113 |
| c9 | | Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Defect-Oriented Verilog Fault Simulation of SoC Macros using a Stratified Fault Sampling Technique. VTS 1999: 326-332 |
| 1998 | ||
| c8 | | Fernando M. Gonçalves, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Defect-oriented test quality assessment using fault sampling and simulation. ITC 1998: 35-42 |
| 1996 | ||
| c7 | | F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos, João Paulo Teixeira: Defect-Oriented IC Test and Diagnosis Using VHDL Fault Simulation. ITC 1996: 620-628 |
| 1995 | ||
| c6 | | Marcelino B. Santos, M. Simões, Isabel C. Teixeira, João Paulo Teixeira: Test preparation for high coverage of physical defects in CMOS digital ICs. VTS 1995: 330-337 |
| 1994 | ||
| c5 | | Antonio Casimiro, Fernando M. Gonçalves, João Paulo Teixeira, Marcelino B. Santos: On the Analysis of Routing Cells and Adjacency Faults in CMOS Digital Circuits. DFT 1994: 263-270 |
| c4 | | M. Calha, Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Back Annotation of Physical Defects into Gate-Level, Realistic Faults in Digital ICs. ITC 1994: 720-728 |
| 1993 | ||
| c3 | | Antonio Casimiro, M. Simões, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs. DFT 1993: 109-116 |
| c2 | | P. Nicolau, J. Barbosa, M. Saraiva, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Realistic Fault Analysis of CMOS Analog Building Blocks. DFT 1993: 311-318 |
| 1992 | ||
| j1 | | M. Saraiva, Marcelino B. Santos, Antonio Casimiro, Isabel Maria Cacho Teixeira, João Paulo Teixeira: On the design of a highly testable cell library. Microprocessing and Microprogramming 35(1-5): 383-389 (1992) |
| c1 | | M. Saraiva, P. Casimiro, Marcelino B. Santos, José T. de Sousa, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira: Physical DFT for High Coverage of Realistic Faults. ITC 1992: 642-651 |
Colors in the list of coauthors
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