Kishor Sarawadekar

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	2012
j3		Kishor Sarawadekar, Swapna Banerjee: VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000. Integration 45(1): 1-8 (2012)
j2		Kishor Sarawadekar, Harihar Bharat Indana, Deep Bera, Swapna Banerjee: VLSI-DSP based real time solution of DSC-SRI for an ultrasound system. Microprocessors and Microsystems - Embedded Hardware Design 36(1): 1-12 (2012)
	2011
j1		Kishor Sarawadekar, Swapna Banerjee: An Efficient Pass-Parallel Architecture for Embedded Block Coder in JPEG 2000. IEEE Trans. Circuits Syst. Video Techn. 21(6): 825-836 (2011)
	2009
c1		Kishor Sarawadekar, Swapna Banerjee: Efficient VLSI architecture for bit plane encoder of JPEG 2000. ICIP 2009: 2805-2808

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