| 2010 | ||
|---|---|---|
| i2 | Kien C. Nguyen, Dilip V. Sarwate: Up-sampling and Natural Sample Value Computation for Digital Pulse Width Modulators. CoRR abs/1003.2441 (2010) | |
| 2009 | ||
| c8 | Dilip V. Sarwate, Zhiyuan Yan: Modified Euclidean algorithms for decoding Reed-Solomon codes. ISIT 2009: 1398-1402 | |
| i1 | Dilip V. Sarwate, Zhiyuan Yan: Modified Euclidean Algorithms for Decoding Reed-Solomon Codes. CoRR abs/0906.3778 (2009) | |
| 2008 | ||
| c7 | ||
| 2006 | ||
| j24 | Zhiyuan Yan, Dilip V. Sarwate, Zhongzhi Liu: Erratum to: "High-speed systolic architectures for finite field inversion" [Integration 38(3) (2005) 383-398]. Integration 39(4): 474-476 (2006) | |
| c6 | Zhiyuan Yan, Dilip V. Sarwate: Reduced-Complexity Pipelined Architectures for Finite Field Inversions. SiPS 2006: 56-61 | |
| 2005 | ||
| j23 | Zhiyuan Yan, Dilip V. Sarwate, Zhongzhi Liu: High-speed systolic architectures for finite field inversion. Integration 38(3): 383-398 (2005) | |
| j22 | Dilip V. Sarwate: Comments on "Lower bounds on the Hamming auto- and cross correlations of frequency-hopping sequences" by D. Peng and P. Fan. IEEE Transactions on Information Theory 51(4): 1615- (2005) | |
| c5 | Zhiyuan Yan, Dilip V. Sarwate: Area-efficient two-dimensional architectures for finite field inversion and division. ACM Great Lakes Symposium on VLSI 2005: 116-121 | |
| c4 | Zhiyuan Yan, Dilip V. Sarwate, Zhongzhi Liu: Area-efficient systolic architectures for inversions over GF(2/sup m/). ISCAS (6) 2005: 5838-5841 | |
| e1 | Tor Helleseth, Dilip V. Sarwate, Hong-Yeop Song, Kyeongcheol Yang (Eds.): Sequences and Their Applications - SETA 2004, Third International Conference, Seoul, Korea, October 24-28, 2004, Revised Selected Papers. Lecture Notes in Computer Science 3486, Springer 2005, isbn 3-540-26084-6 | |
| 2004 | ||
| c3 | Zhiyuan Yan, Dilip V. Sarwate: Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm. ACM Great Lakes Symposium on VLSI 2004: 51-56 | |
| c2 | Zhiyuan Yan, Dilip V. Sarwate: High-speed systolic architectures for finite field inversion and division. ACM Great Lakes Symposium on VLSI 2004: 462-465 | |
| 2003 | ||
| j21 | Zukui Song, Dilip V. Sarwate: The frequency spectrum of pulse width modulated signals. Signal Processing 83(10): 2227-2258 (2003) | |
| j20 | Zhiyuan Yan, Dilip V. Sarwate: New Systolic Architectures for Inversion and Division in GF(2^m). IEEE Trans. Computers 52(11): 1514-1519 (2003) | |
| 2002 | ||
| c1 | Zhiyuan Yan, Dilip V. Sarwate: Systolic architectures for finite field inversion and division. ISCAS (5) 2002: 789-792 | |
| 2001 | ||
| j19 | Dilip V. Sarwate, Naresh R. Shanbhag: High-speed architectures for Reed-Solomon decoders. IEEE Trans. VLSI Syst. 9(5): 641-655 (2001) | |
| 1995 | ||
| j18 | Dilip V. Sarwate: Comments on "An alternative derivation for the signal-to-noise ratio of a SSMA system". IEEE Transactions on Communications 43(12): 2903 (1995) | |
| 1994 | ||
| j17 | Kapil K. Chawla, Dilip V. Sarwate: Parallel acquisition of PN sequences in DS/SS systems. IEEE Transactions on Communications 42(5): 2155-2164 (1994) | |
| j16 | Kapil K. Chawla, Dilip V. Sarwate: Acquisition of PN sequences in chip synchronous DS/SS systems using a random sequence model and the SPRT. IEEE Transactions on Communications 42(6): 2325-2334 (1994) | |
| j15 | M. Srinivasan, Dilip V. Sarwate: Malfunction in the Peterson-Gorenstein- Zierler decoder. IEEE Transactions on Information Theory 40(5): 1649-1653 (1994) | |
| 1990 | ||
| j14 | Alex W. Lam, Dilip V. Sarwate: Time-hopping and frequency-hopping multiple-access packet communications. IEEE Transactions on Communications 38(6): 875-888 (1990) | |
| j13 | Kapil K. Chawla, Dilip V. Sarwate: Upper bounds on the probability of error for M-ary orthogonal signaling in white Gaussian noise. IEEE Transactions on Information Theory 36(3): 627-633 (1990) | |
| j12 | Arvind Krishna, Dilip V. Sarwate: Pseudocyclic maximum- distance-separable codes. IEEE Transactions on Information Theory 36(4): 880-884 (1990) | |
| j11 | Dilip V. Sarwate, Robert D. Morrison: Decoder malfunction in BCH decoders. IEEE Transactions on Information Theory 36(4): 884-889 (1990) | |
| 1988 | ||
| j10 | Dilip V. Sarwate: Computation of Cyclic Redundancy Checks via Table Look-Up. Commun. ACM 31(8): 1008-1013 (1988) | |
| 1984 | ||
| j9 | S. M. Krone, Dilip V. Sarwate: Quadriphase sequences for spread-spectrum multiple-access communication. IEEE Transactions on Information Theory 30(3): 520-528 (1984) | |
| j8 | Dilip V. Sarwate: In Memoriam: Robert Tienwen Chien (1931-1983). IEEE Transactions on Information Theory 30(4): 583-586 (1984) | |
| j7 | Dilip V. Sarwate: An upper bound on the aperiodic autocorrelation function for a maximal-length sequence. IEEE Transactions on Information Theory 30(4): 685-687 (1984) | |
| 1983 | ||
| j6 | Dilip V. Sarwate: A Note on ``A Note on Multiple Error Detection in ASCII Numeric Data Communication''. J. ACM 30(1): 33-35 (1983) | |
| 1981 | ||
| j5 | Robert J. McEliece, Dilip V. Sarwate: On Sharing Secrets and Reed-Solomon Codes. Commun. ACM 24(9): 583-584 (1981) | |
| 1980 | ||
| j4 | Dilip V. Sarwate: A Note on Universal Classes of Hash Functions. Inf. Process. Lett. 10(1): 41-45 (1980) | |
| 1979 | ||
| j3 | Daniel S. Hirschberg, Ashok K. Chandra, Dilip V. Sarwate: Computing Connected Components on Parallel Computers. Commun. ACM 22(8): 461-464 (1979) | |
| 1978 | ||
| j2 | Franco P. Preparata, Dilip V. Sarwate: An Improved Parallel Processor Bound in Fast Matrix Inversion. Inf. Process. Lett. 7(3): 148-150 (1978) | |
| j1 | Dilip V. Sarwate: Semi-Fast Fourier Transforms over GF(2m). IEEE Trans. Computers 27(3): 283-285 (1978) | |
Colors in the list of coauthors
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