Ron Sass

Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass: Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfig. Comp. 2012 (2012)

William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French: Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfig. Comp. 2012 (2012)

Andrew G. Schmidt, William V. Kritikos, Shanyuan Gao, Ron Sass: An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. Int. J. Reconfig. Comp. 2012 (2012)

Andrew G. Schmidt, Neil Steiner, Matthew French, Ron Sass: HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. Int. J. Reconfig. Comp. 2012 (2012)

Andrew G. Schmidt, Siddhartha Datta, Ashwin A. Mendon, Ron Sass: Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. Parallel Computing 38(8): 344-364 (2012)

Ashwin A. Mendon, Ron Sass, Zachary K. Baker, Justin L. Tripp: Design and implementation of a hardware checkpoint/restart core. DSN Workshops 2012: 1-6

Yamuna Rajasekhar, Rahul R. Sharma, Ron Sass: An Extensible and Portable Tool Suite for Managing Multi-Node FPGA Systems. FCCM 2012: 117-120

Ashwin A. Mendon, Bin Huang, Ron Sass: A high performance, open source SATA2 core. FPL 2012: 421-428

Scott Buscemi, Ron Sass: Design and utilization of an FPGA cluster to implement a Digital Wireless Channel Emulator. FPL 2012: 635-638

Yamuna Rajasekhar, Ron Sass: Architecture and Applications for an All-FPGA Parallel Computer. ICPP Workshops 2012: 157-164

Shweta Jain-Mendon, Ron Sass: A case study of streaming storage format for sparse matrices. ReConFig 2012: 1-6

Rahul R. Sharma, Yamuna Rajasekhar, Ron Sass: Exploring hardware work queue support for lightweight threads in MPSoCs. ReConFig 2012: 1-6

Andrew G. Schmidt, Bin Huang, Ron Sass, Matthew French: Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. FCCM 2011: 162-169

William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass: A Radix Tree Router for Scalable FPGA Networks. FPL 2011: 76-81

Andrew G. Schmidt, Ron Sass: Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. ReConFig 2011: 422-427

Shanyuan Gao, Andrew G. Schmidt, Ron Sass: Impact of reconfigurable hardware on accelerating MPI_Reduce. FPT 2010: 29-36

Robin Pottathuparambil, Ron Sass: FPGA-based three-body molecular dynamics simulator. HPCS 2010: 599-605

Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French: Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig 2010: 334-339

Ron Sass, Russell Tessier (Eds.): 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2010, Charlotte, North Carolina, USA, 2-4 May 2010. IEEE Computer Society 2010, isbn 978-0-7695-4056-6

Ashwin A. Mendon, Andrew G. Schmidt, Ron Sass: A Hardware Filesystem Implementation with Multidisk Support. Int. J. Reconfig. Comp. 2009 (2009)

Nathan DeBardeleben, Ron Sass, Daniel C. Stanzione Jr., Walter B. Ligon III: Building problem-solving environments with the Arches framework. Journal of Systems and Software 82(7): 1137-1151 (2009)

Siddhartha Datta, Parag Beeraka, Ron Sass: RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function. FCCM 2009: 88-95

Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass: AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. FCCM 2009: 271-274

Robin Pottathuparambil, Ron Sass: A parallel/vectorized double-precision exponential core to accelerate computational science applications. FPGA 2009: 285

Shanyuan Gao, Andrew G. Schmidt, Ron Sass: Hardware implementation of MPI_Barrier on an FPGA cluster. FPL 2009: 12-17

Siddhartha Datta, Ron Sass: Scalability Studies of the BLASTn Scan and Ungapped Extension Functions. ReConFig 2009: 131-136

David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. VLSI Syst. 16(1): 34-44 (2008)

Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass: FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM 2008: 298-299

Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass: Reconfigurable Computing Cluster Project: Phase I Brief. FCCM 2008: 300-301

Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass: Teaching FPGA system design via a remote laboratory facility. FPL 2008: 687-690

Ashwin A. Mendon, Ron Sass: A Hardware Filesystem Implementation for High-Speed Secondary Storage. ReConFig 2008: 283-288

Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka: Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM 2007: 127-140

Andrew G. Schmidt, Ron Sass: Quantifying Effective Memory Bandwidth of Platform FPGAs. FCCM 2007: 337-338

Kushal Datta, Ron Sass: RBoot: Software Infrastructure for a Remote FPGA Laboratory. FCCM 2007: 343-344

Andrew G. Schmidt, Ron Sass: Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. FPL 2007: 601-604

Ron Sass, Brian Greskamp, Brian Leonard, Jeff Young, Srinivas Beeravolu: Online architectures: A theoretical formulation and experimental prototype. Microprocessors and Microsystems 30(6): 319-333 (2006)

David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: The Case for High Level Programming Models for Reconfigurable Computers. ERSA 2006: 21-32

Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews: Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM 2006: 89-98

Jason Agron, Wesley Peck, Erik K. Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens: Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS 2006: 3-12

Brian Greskamp, Ron Sass: A Virtual Machine for Merit-Based Runtime Reconfiguration. FCCM 2005: 287-288

Krishna Muriki, Keith D. Underwood, Ron Sass: RC-BLAST: Towards a Portable, Cost-Effective Open Source Hardware Implementation. IPDPS 2005

Pradeep Nalabalapu, Ron Sass: Bandwidth Management with a Reconfigurable Data Cache. IPDPS 2005

Keith D. Underwood, Walter B. Ligon III, Ron R. Sass: An Analysis of the Cost Effectiveness of an Adaptable Computing Cluster. Cluster Computing 7(4): 357-371 (2004)

Jeff Young, Ron Sass: FERP Interface and Interconnect Cores for Stream Processing Applications. EUC 2004: 291-300

Ranjesh G. Jaganathan, Matthew Simpson, Ron Sass: Automatic discovery, selection, and specialization of modules in RCADE. FPGA 2004: 256

Brian Leonard, Jeff Young, Ron Sass: Online placement infrastructure to support run-time reconfiguration. FPGA 2004: 256

Nathan DeBardeleben, Walter B. Ligon III, Ron Sass: Arches: An Infrastructure for PSE Development. HIPS 2004: 120-128

Keith D. Underwood, Walter B. Ligon III, Ron Sass: Analysis of a prototype intelligent network interface. Concurrency and Computation: Practice and Experience 15(7-8): 751-777 (2003)

Ranjesh G. Jaganathan, Keith D. Underwood, Ron R. Sass: A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. FCCM 2003: 286-287

Shyamnath Harinath, Ron Sass: Reconfigurable Mapping Functions for Online Architectures. IPDPS 2003: 173

Ranjesh G. Jaganathan, Keith D. Underwood, Ron Sass: A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. SC 2003: 22

Keith D. Underwood, Ron Sass, Walter B. Ligon III: A Reconfigurable Extension to the Network Interface of Beowulf Clusters. CLUSTER 2001: 212-

Keith D. Underwood, Ron R. Sass, Walter B. Ligon III: Acceleration of a 2D-FFT on an Adaptable Computing Cluster. FCCM 2001: 180-189

Keith D. Underwood, Ron R. Sass, Walter B. Ligon III: Cost effectiveness of an adaptable computing cluster. SC 2001: 54

Marwan Krunz, Ron Sass, Herman D. Hughes: Statistical Characteristics and Multiplexing of MPEG Streams. INFOCOM 1995: 455-462

Ron Sass, Matt W. Mutka: Transformations on Doubly Nested Loops. IFIP PACT 1994: 343-346

Ron Sass, Matt W. Mutka: Enabling unimodular transformations. SC 1994: 753-762

Chi-Ming Chiang, Qiang Du, Matt W. Mutka, Ron Sass: An Empirical Study of Scalable Domain Decomposition Methods for a 2-D Parabolic Equation Solver. PPSC 1993: 687-690