| 2013 | ||
|---|---|---|
| j34 | Murugappan Senthilvelan, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner: Instruction Set Extensions for Matrix Decompositions on Software Defined Radio Architectures. Signal Processing Systems 70(3): 289-303 (2013) | |
| c74 | Daniel W. Chang, Gyungsu Byun, Hoyoung Kim, Minwook Ahn, Soojung Ryu, Nam Sung Kim, Michael J. Schulte: Reevaluating the latency claims of 3D stacked memories. ASP-DAC 2013: 657-662 | |
| 2012 | ||
| j33 | Sonia Gonzalez-Navarro, Javier Hormigo, Michael J. Schulte: A study of decimal left shifters for binary numbers. Inf. Comput. 216: 47-56 (2012) | |
| c73 | Vijay Sathisha, Michael J. Schulte, Nam Sung Kim: Lossless and lossy memory I/O link compression for improving performance of GPGPU workloads. PACT 2012: 325-334 | |
| c72 | Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte, Nam Sung Kim: Workload and power budget partitioning for single-chip heterogeneous processors. PACT 2012: 401-410 | |
| c71 | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte: Power-efficient computing for compute-intensive GPGPU applications. PACT 2012: 445-446 | |
| c70 | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte: Virtual Floating-Point Units for Low-Power Embedded Processors. ASAP 2012: 61-68 | |
| c69 | Ardavan Pedram, Syed Zohaib Gilani, Nam Sung Kim, Robert A. van de Geijn, Michael J. Schulte, Andreas Gerstlauer: A Linear Algebra Core Design for Efficient Level-3 BLAS. ASAP 2012: 149-152 | |
| c68 | Hamid Reza Ghasemi, Abhishek A. Sinkar, Michael J. Schulte, Nam Sung Kim: Cost-effective power delivery to support per-core voltage domains for power-constrained processors. DAC 2012: 56-61 | |
| c67 | Jacob Adriaens, Katherine Compton, Nam Sung Kim, Michael J. Schulte: The case for GPGPU spatial multitasking. HPCA 2012: 79-90 | |
| c66 | Yasuko Eckert, Srilatha Manne, Michael J. Schulte, David A. Wood: Something old and something new: P-states can borrow microarchitecture techniques too. ISLPED 2012: 385-390 | |
| c65 | Youngtaek Kim, Lizy Kurian John, Sanjay Pant, Srilatha Manne, Michael J. Schulte, William Lloyd Bircher, Madhu S. Sibi Govindan: AUDIT: Stress Testing the Automatic Way. MICRO 2012: 212-223 | |
| 2011 | ||
| j32 | Samuel Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte, Katherine Compton: Hardware Designs for Binary Integer Decimal-Based Rounding. IEEE Trans. Computers 60(5): 614-627 (2011) | |
| c64 | Jungseob Lee, Vijay Sathisha, Michael J. Schulte, Katherine Compton, Nam Sung Kim: Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency and Core Scaling. PACT 2011: 111-120 | |
| c63 | Ahmet Akkas, Michael J. Schulte: A decimal floating-point fused multiply-add unit with a novel decimal leading-zero anticipator. ASAP 2011: 43-50 | |
| c62 | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte: Energy-efficient floating-point arithmetic for software-defined radio architectures. ASAP 2011: 122-129 | |
| c61 | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte: Scratchpad memory optimizations for digital signal processing applications. DATE 2011: 974-979 | |
| c60 | Daniel W. Chang, Nam Sung Kim, Michael J. Schulte: Analyzing the performance and energy impact of 3D memory integration on embedded DSPs. ICSAMOS 2011: 303-310 | |
| c59 | Amin Farmahini Farahani, Anthony E. Gregerson, Michael J. Schulte, Katherine Compton: Modular high-throughput and low-latency sorting units for FPGAs in the Large Hadron Collider. SASP 2011: 38-45 | |
| 2010 | ||
| j31 | Liang-Kai Wang, Mark A. Erle, Charles Tsen, Eric M. Schwarz, Michael J. Schulte: A survey of hardware designs for decimal arithmetic. IBM Journal of Research and Development 54(2): 8 (2010) | |
| j30 | Christipher D. Jenkins, Michael J. Schulte, John Glossner: Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform. IJHPSA 2(3/4): 203-214 (2010) | |
| c58 | Aishwarya Nagarajan, Michael J. Schulte, Parameswaran Ramanathan: Galois field hardware architectures for network coding. ANCS 2010: 35 | |
| c57 | Daniel W. Chang, Christipher D. Jenkins, Philip C. Garcia, Syed Zohaib Gilani, Paula Aguilera, Aishwarya Nagarajan, Michael J. Anderson, Matthew A. Kenny, Sean M. Bauer, Michael J. Schulte, Katherine Compton: ERCBench: An Open-Source Benchmark Suite for Embedded and Reconfigurable Computing. FPL 2010: 408-413 | |
| c56 | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner: CORDIC-based LMMSE equalizer for Software Defined Radio. ICSAMOS 2010: 301-308 | |
| c55 | Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael J. Schulte, Yu Hen Hu: ARAL-CR: An adaptive reasoning and learning cognitive radio platform. ICSAMOS 2010: 324-331 | |
| 2009 | ||
| j29 | JoAnn M. Paul, Mwaffaq Otoom, Marc Somers, Sean M. Pieper, Michael J. Schulte: The Emerging Landscape of Computer Performance Evaluation. Advances in Computers 75: 235-280 (2009) | |
| j28 | Suman Mamidi, Emily R. Blem, Michael J. Schulte, John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar: Instruction set extensions for software defined radio. Microprocessors and Microsystems - Embedded Hardware Design 33(4): 260-272 (2009) | |
| j27 | Dimitri Tan, Carl Lemonds, Michael J. Schulte: Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support. IEEE Trans. Computers 58(2): 175-187 (2009) | |
| j26 | Liang-Kai Wang, Michael J. Schulte, John D. Thompson, Nandini Jairam: Hardware Designs for Decimal Floating-Point Addition and Related Operations. IEEE Trans. Computers 58(3): 322-335 (2009) | |
| j25 | Mark A. Erle, Brian J. Hickmann, Michael J. Schulte: Decimal Floating-Point Multiplication. IEEE Trans. Computers 58(7): 902-916 (2009) | |
| c54 | Liang-Kai Wang, Michael J. Schulte: A Decimal Floating-Point Adder with Decoded Operands and a Decimal Leading-Zero Anticipator. IEEE Symposium on Computer Arithmetic 2009: 125-134 | |
| c53 | Charles Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte, Brian J. Hickmann, Katherine Compton: A Combined Decimal and Binary Floating-Point Multiplier. ASAP 2009: 8-15 | |
| c52 | Anthony E. Gregerson, Amin Farmahini Farahani, Ben Buchli, Steve Naumov, Michail Bachtis, Katherine Compton, Michael J. Schulte, Wesley H. Smith, Sridhara Dasu: FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider. FCCM 2009: 19-26 | |
| c51 | Michael J. Anderson, Chuck Tsen, Liang-Kai Wang, Katherine Compton, Michael J. Schulte: Performance analysis of decimal floating-point libraries and its impact on decimal hardware and software solutions. ICCD 2009: 465-471 | |
| e1 | Walid A. Najjar, Michael J. Schulte (Eds.): Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2009), Samos, Greece, July 20-23, 2009. IEEE 2009, isbn 978-1-4244-4501-1 | |
| 2008 | ||
| c50 | John Glossner, Daniel Iancu, Mayan Moudgill, Sanjay Jinturkar, Gary Nacer, Stuart Stanley, Andrei Iancu, Hua Ye, Michael J. Schulte, Mihai Sima, Tomas Palenik, Peter Farkas, Jarmo Takala: Implementing communications systems on an SDR SoC. ICASSP 2008: 5380-5383 | |
| c49 | Brian J. Hickmann, Michael J. Schulte, Mark A. Erle: Improved combined binary/decimal fixed-point multipliers. ICCD 2008: 87-94 | |
| 2007 | ||
| j24 | Sean M. Pieper, JoAnn M. Paul, Michael J. Schulte: A New Era of Performance Evaluation. IEEE Computer 40(9): 23-30 (2007) | |
| j23 | John Glossner, Daniel Iancu, Mayan Moudgill, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael J. Schulte: The Sandbridge SB3011 Platform. EURASIP J. Emb. Sys. 2007 (2007) | |
| j22 | Liang-Kai Wang, Michael J. Schulte: A Decimal Floating-Point Divider Using Newton-Raphson Iteration. VLSI Signal Processing 49(1): 3-18 (2007) | |
| c48 | Mark A. Erle, Michael J. Schulte, Brian J. Hickmann: Decimal Floating-Point Multiplication Via Carry-Save Addition. IEEE Symposium on Computer Arithmetic 2007: 46-55 | |
| c47 | Liang-Kai Wang, Michael J. Schulte: Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding. IEEE Symposium on Computer Arithmetic 2007: 56-68 | |
| c46 | Charles Tsen, Michael J. Schulte, Sonia Gonzalez-Navarro: Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit. ASAP 2007: 115-121 | |
| c45 | Suman Mamidi, Michael J. Schulte, Daniel Iancu, C. John Glossner: Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems. ASAP 2007: 320-327 | |
| c44 | Liang-Kai Wang, Charles Tsen, Michael J. Schulte, Divya Jhalani: Benchmarks and performance analysis of decimal floating-point applications. ICCD 2007: 164-170 | |
| c43 | Charles Tsen, Sonia Gonzalez-Navarro, Michael J. Schulte: Hardware design of a Binary Integer Decimal-based floating-point adder. ICCD 2007: 288-295 | |
| c42 | Brian J. Hickmann, Andrew Krioukov, Michael J. Schulte, Mark A. Erle: A parallel IEEE P754 decimal floating-point multiplier. ICCD 2007: 296-303 | |
| c41 | Michael J. Schulte, Dimitri Tan, Carl Lemonds: Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier. ICCD 2007: 304-310 | |
| c40 | John Glossner, Daniel Iancu, Mayan Moudgill, Michael J. Schulte, Stamatis Vassiliadis: Trends in Low Power Handset Software Defined Radio. SAMOS 2007: 313-321 | |
| c39 | Mihai Sima, Murugappan Senthilvelan, Daniel Iancu, C. John Glossner, Mayan Moudgill, Michael J. Schulte: Software Solutions for Converting a MIMO-OFDM Channel into Multiple SISO-OFDM Channels. WiMob 2007: 9 | |
| 2006 | ||
| j21 | Philip Garcia, Katherine Compton, Michael J. Schulte, Emily R. Blem, Wenyin Fu: An Overview of Reconfigurable Hardware in Embedded Systems. EURASIP J. Emb. Sys. 2006 (2006) | |
| j20 | Ahmet Akkas, Michael J. Schulte: Dual-mode floating-point multiplier architectures with parallel operations. Journal of Systems Architecture 52(10): 549-562 (2006) | |
| j19 | Mustafa Gök, Michael J. Schulte, Mark G. Arnold: Integer Multipliers with Overflow Detection. IEEE Trans. Computers 55(8): 1062-1066 (2006) | |
| j18 | Kent E. Wires, Michael J. Schulte: Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication. VLSI Signal Processing 42(3): 257-272 (2006) | |
| j17 | Michael J. Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis: A Low-Power Multithreaded Processor for Software Defined Radio. VLSI Signal Processing 43(2-3): 143-159 (2006) | |
| 2005 | ||
| j16 | Robert D. Kenney, Michael J. Schulte: High-Speed Multioperand Decimal Adders. IEEE Trans. Computers 54(8): 953-963 (2005) | |
| j15 | Michael J. Schulte, Shuvra S. Bhattacharyya, Robert Schreiber: Guest Editorial. VLSI Signal Processing 40(1): 5-6 (2005) | |
| c38 | Mark A. Erle, Eric M. Schwarz, Michael J. Schulte: Decimal Multiplication with Efficient Partial Product Generation. IEEE Symposium on Computer Arithmetic 2005: 21-28 | |
| c37 | E. George Walters III, Michael J. Schulte: Efficient Function Approximation Using Truncated Multipliers and Squarers. IEEE Symposium on Computer Arithmetic 2005: 232-239 | |
| c36 | Liang-Kai Wang, Michael J. Schulte: Decimal Floating-Point Square Root Using Newton-Raphson Iteration. ASAP 2005: 309-315 | |
| c35 | Suman Mamidi, Daniel Iancu, Andrei Iancu, Michael J. Schulte, John Glossner: Instruction Set Extensions for Reed-Solomon Encoding and Decoding. ASAP 2005: 364-369 | |
| c34 | Suman Mamidi, Emily R. Blem, Michael J. Schulte, C. John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar: Instruction set extensions for software defined radio on a multithreaded processor. CASES 2005: 266-273 | |
| c33 | C. John Glossner, Mayan Moudgill, Daniel Iancu, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael Samori, Tanuj Raja, Michael J. Schulte, Stamatis Vassiliadis: Future wireless convergence platforms. CODES+ISSS 2005: 7-12 | |
| c32 | James E. Stine, Michael J. Schulte: A combined two's complement and floating-point comparator. ISCAS (1) 2005: 89-92 | |
| c31 | C. John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael J. Schulte, Stamatis Vassiliadis: Sandbridge Software Tools. SAMOS 2005: 269-278 | |
| 2004 | ||
| j14 | Ahmet Akkas, Michael J. Schulte, James E. Stine: Intrinsic Compiler Support for Interval Arithmetic. Numerical Algorithms 37(1-4): 13-20 (2004) | |
| c30 | Liang-Kai Wang, Michael J. Schulte: Decimal Floating-Point Division Using Newton-Raphson Iteration. ASAP 2004: 84-95 | |
| c29 | Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis: A Low-Power Carry Skip Adder with Fast Saturation. ASAP 2004: 269-279 | |
| c28 | Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis: A Static Low-Power, High-Performance 32-bit Carry Skip Adder. DSD 2004: 615-619 | |
| c27 | Robert D. Kenney, Michael J. Schulte, Mark A. Erle: A High-Frequency Decimal Multiplier. ICCD 2004: 26-29 | |
| c26 | ||
| c25 | Shankar Krithivasan, Michael J. Schulte, John Glossner: A Subword-Parallel Multiplication and Sum-of-Squares Unit. ISVLSI 2004: 273-274 | |
| c24 | John D. Thompson, Nandini Karra, Michael J. Schulte: A 64-bit Decimal Floating-Point Adder. ISVLSI 2004: 297-298 | |
| c23 | Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis: A Low-Power Multithreaded Processor for Baseband Communication Systems. SAMOS 2004: 393-402 | |
| 2003 | ||
| c22 | Mark G. Arnold, Jesus Garcia, Michael J. Schulte: The Interval Logarithmic Number System. IEEE Symposium on Computer Arithmetic 2003: 253-261 | |
| c21 | Michael J. Schulte, Louis Marquette, Shankar Krithivasan, E. George Walters III, John Glossner: Combined Multiplication and Sum-of-Squares Units. ASAP 2003: 204-214 | |
| c20 | ||
| c19 | Ahmet Akkas, Michael J. Schulte: A Quadruple Precision and Dual Double Precision Floating-Point Multiplier. DSD 2003: 76-81 | |
| 2002 | ||
| j13 | ||
| c18 | C. John Glossner, Michael J. Schulte, Stamatis Vassiliadis: A Java-Enabled DSP. Embedded Processor Design Challenges 2002: 307-326 | |
| 2001 | ||
| c17 | K'Andrea C. Bickerstaff, Earl E. Swartzlander Jr., Michael J. Schulte: Analysis of Column Compression Multipliers. IEEE Symposium on Computer Arithmetic 2001: 33-39 | |
| c16 | Kent E. Wires, Michael J. Schulte, Don McCarley: FPGA Resource Reduction Through Truncated Multiplication. FPL 2001: 574-583 | |
| c15 | Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C. John Glossner, Erdem Hokenek: Design Alternatives for Parallel Saturating Multioperand Adders. ICCD 2001: 172-177 | |
| c14 | Kent E. Wires, Michael J. Schulte, James E. Stine: Combined IEEE Compliant and Truncated Floating Point Multipliers for Reduced Power Dissipation. ICCD 2001: 497-500 | |
| 2000 | ||
| j12 | Michael J. Schulte, Earl E. Swartzlander Jr.: A Family of Variable-Precision Interval Arithmetic Processors. IEEE Trans. Computers 49(5): 387-397 (2000) | |
| j11 | Michael J. Schulte, Pablo I. Balzola, Ahmet Akkas, Robert W. Brocato: Integer Multiplication with Overflow Detection or Saturation. IEEE Trans. Computers 49(7): 681-691 (2000) | |
| c13 | Javier Hormigo, Julio Villalba, Michael J. Schulte: A Hardware Algorithm for Variable-Precision Logarithm. ASAP 2000: 215-224 | |
| c12 | Michael J. Schulte, Pablo I. Balzola, Jie Ruan, C. John Glossner: Parallel saturating multioperand adders. CASES 2000: 172-179 | |
| c11 | Dean Batten, Sanjay Jinturkar, C. John Glossner, Michael J. Schulte, Paul D'Arcy: A New Approach to DSP Intrinsic Functions. HICSS 2000 | |
| 1999 | ||
| j10 | Michael J. Schulte, Vitaly Zelov, Ahmet Akkas, James Craig Burley: The Interval-Enhanced GNU Fortran Compiler. Reliable Computing 5(3): 311-322 (1999) | |
| j9 | Michael J. Schulte, James E. Stine: Approximating Elementary Functions with Symmetric Bipartite Tables. IEEE Trans. Computers 48(8): 842-847 (1999) | |
| j8 | James E. Stine, Michael J. Schulte: The Symmetric Table Addition Method for Accurate Function Approximation. VLSI Signal Processing 21(2): 167-177 (1999) | |
| c10 | Michael J. Schulte, Kent E. Wires: High-Speed Inverse Square Roots. IEEE Symposium on Computer Arithmetic 1999: 124- | |
| c9 | Navindra Yadav, Michael J. Schulte, John Glossner: Parallel Saturating Fractional Arithmetic Units. Great Lakes Symposium on VLSI 1999: 214-217 | |
| 1998 | ||
| c8 | James E. Stine, Michael J. Schulte: A Combined Interval and Floating Point Multiplier. Great Lakes Symposium on VLSI 1998: 208- | |
| 1997 | ||
| c7 | Michael J. Schulte, James E. Stine: Symmetric Bipartite Tables for Accurate Function Approximation. IEEE Symposium on Computer Arithmetic 1997: 175-183 | |
| c6 | Michael J. Schulte, James E. Stine: Accurate Function Approximations by Symmetric Table Lookup and Addition. ASAP 1997: 144-153 | |
| 1996 | ||
| j7 | Michael J. Schulte, Earl E. Swartzlander Jr.: Variable-precision, interval arithmetic coprocessors. Reliable Computing 2(1): 47-62 (1996) | |
| j6 | Thomas Lynch, Michael J. Schulte: Software for high radix on-line arithmetic. Reliable Computing 2(2): 133-138 (1996) | |
| j5 | ||
| 1995 | ||
| j4 | Thomas Lynch, Michael J. Schulte: A High Radix On-Line Arithmetic for Credible and Accurate Computing. J. UCS 1(7): 439-453 (1995) | |
| j3 | K'Andrea C. Bickerstaff, Michael J. Schulte, Earl E. Swartzlander Jr.: Parallel reduced area multipliers. VLSI Signal Processing 9(3): 181-191 (1995) | |
| c5 | Thomas Lynch, Ashraf Ahmed, Michael J. Schulte, Thomas K. Callaway, Robert Tisdale: The K5 transcendental functions. IEEE Symposium on Computer Arithmetic 1995: 163- | |
| c4 | Michael J. Schulte, Earl E. Swartzlander Jr.: Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor. IEEE Symposium on Computer Arithmetic 1995: 222-229 | |
| c3 | Michael J. Schulte, Earl E. Swartzlander Jr.: A Processor for Staggered Interval Arithmetic. ASAP 1995: 104-112 | |
| c2 | Michael J. Schulte, Earl E. Swartzlander Jr.: A coprocessor for accurate and reliable numerical computations. ICCD 1995: 686- | |
| 1994 | ||
| j2 | Michael J. Schulte, J. Omar, Earl E. Swartzlander Jr.: Optimal initial approximations for the Newton-Raphson division algorithm. Computing 53(3-4): 233-242 (1994) | |
| j1 | Michael J. Schulte, Earl E. Swartzlander Jr.: Hardware Designs for Exactly Rounded Elemantary Functions. IEEE Trans. Computers 43(8): 964-973 (1994) | |
| 1993 | ||
| c1 | Michael J. Schulte, Earl E. Swartzlander Jr.: Exact rounding of certain elementary functions. IEEE Symposium on Computer Arithmetic 1993: 138-145 | |
Colors in the list of coauthors
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