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 | 1998 | |
|---|---|---|
| c4 |      | Toshihiro Hattori, Yusuke Nitta, Mitsuho Seki, Susumu Narita, Kunio Uchiyama, Tsuyoshi Takahashi, Ryuichi Satomura: Design Methodology of a 200MHz Superscalar Microprocessor: SH-4. DAC 1998: 246-249 |
| 1994 | ||
| c3 | | Mitsuho Seki, Kenji Inoue, Kazuo Kato, Kouki Tsurusaki, Shin'ichi Fukasawa, Hitoshi Sasaki, Mutsuhito Aizawa: A specified delay accomplishing clock router using multiple layers. ICCAD 1994: 289-292 |
| 1993 | ||
| c2 |  | Mitsuho Seki, Shun'ichi Kobayashi, Munehiro Takubo, Kazuyoshi Kurosawa: A New Floorplan Simultaneously Placing Blocks over Two Logic Layers for Sea-of-gate Gate Arrays. ISCAS 1993: 1758-1761 |
| 1991 | ||
| c1 | | Yutaka Sekiyama, Yasuyuki Fujihara, Terumine Hayashi, Mitsuho Seki, Jiro Kusuhara, Kazuhiko Iijima, Masahiro Takakura, Koji Fukatani: Timing-Oriented Routers for PCB Layout Design of High-Performance Computers. ICCAD 1991: 332-335 |
Colors in the list of coauthors
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