Henry Selvaraj

Grzegorz Chmaj, Dawid Zydek, Yehia Z. Elhalwagy, Henry Selvaraj: Overlay-NoC and H-Phy based computing using modern Chip Multiprocessors. EIT 2012: 1-6

Dawid Zydek, Henry Selvaraj, Grzegorz Borowik, Tadeusz Luba: Energy characteristic of a processor allocator and a network-on-chip. Applied Mathematics and Computer Science 21(2): 385-399 (2011)

Dawid Zydek, Henry Selvaraj: Fast and efficient processor allocation algorithm for torus-based chip multiprocessors. Computers & Electrical Engineering 37(1): 91-105 (2011)

G. Wiselin Jiji, Henry Selvaraj, G. Evelin Suji: Supervised Classification of White Blood Cells by Fusion of Color Texture Features and Neural Network. International Journal of Computational Intelligence and Applications 10(4): 471-480 (2011)

Bartosz Kajak, Laxmi Gewali, Henry Selvaraj: Ear-Slicing and Quality Triangulation. ICSEng 2011: 194-199

Dawid Zydek, Grzegorz Chmaj, Henry Selvaraj: Extended Analysis of Resource Assignment in Modern Chip Multiprocessors. ICSEng 2011: 457-458

Henry Selvaraj, Dawid Zydek (Eds.): 21st International Conference on Systems Engineering (ICSEng 2011), Las Vegas, NV, USA, Aug. 16-18, 2011. IEEE 2011, isbn 978-1-4577-1078-0

D. Selvathi, Henry Selvaraj, S. Thamarai Selvi: Hybrid Approach for Brain Tumor Segmentation in Magnetic Resonance Images Using Cellular Neural Networks and Optimization Techniques. International Journal of Computational Intelligence and Applications 9(1): 17-31 (2010)

Dawid Zydek, Henry Selvaraj: Hardware implementation of processor allocation schemes for mesh-based chip multiprocessors. Microprocessors and Microsystems - Embedded Hardware Design 34(1): 39-48 (2010)

Dawid Zydek, Henry Selvaraj, Laxmi Gewali: Synthesis of Processor Allocator for Torus-Based Chip MultiProcessors. ITNG 2010: 13-18

Laxmi Gewali, Dan Mazzella, Henry Selvaraj: Constrained Disjoint Paths in Geometric Networks. International Journal of Computational Intelligence and Applications 8(2): 141-154 (2009)

Henry Selvaraj, S. Arivazhagan: Editorial: Applications of Computational Intelligence. International Journal of Computational Intelligence and Applications 8(2) (2009)

Dawid Zydek, Henry Selvaraj: Processor Allocation Problem for NoC-Based Chip Multiprocessors. ITNG 2009: 96-101

A. R. Nadira Banu Kamal, S. Thamarai Selvi, Henry Selvaraj: Iteration-Free Fractal Coding for Image Compression Using Genetic Algorithm. International Journal of Computational Intelligence and Applications 7(4): 429-446 (2008)

Ling Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and optimal voltage selection with multiple supply voltages under resource constraints. Integration 40(2): 174-182 (2007)

Dongxin Wen, Ling Wang, Yingtao Jiang, Henry Selvaraj, Xiao-Zong Yang: Placement-Directed Behavioral Synthesis Scheme for Simultaneous Scheduling Binding and Partitioning with Resources Operating at Multiple Voltages. I. J. Comput. Appl. 14(2): 92-98 (2007)

Venkatesan Muthukumar, Robert J. Bignall, Henry Selvaraj: An efficient variable partitioning approach for functional decomposition of circuits. Journal of Systems Architecture 53(1): 53-67 (2007)

Min Tun, Laxmi Gewali, Henry Selvaraj: Interference Aware Routing in Sensor Network. ITNG 2007: 140-146

Henry Selvaraj, Piotr Sapiecha, Mariusz Rawski, Tadeusz Luba: Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing. International Journal of Computational Intelligence and Applications 6(1): 123-138 (2006)

D. Selvathi, S. Thamarai Selvi, Henry Selvaraj: Abnormality Detection in Brain MR Images Using Minimum Error Thresholding Method. International Journal of Computational Intelligence and Applications 6(2): 177-191 (2006)

Mariusz Rawski, Henry Selvaraj, Tadeusz Luba, Piotr Szotkowski: Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition. International Journal of Computational Intelligence and Applications 6(2): 257-271 (2006)

Henry Selvaraj, S. Thamarai Selvi, D. Selvathi, R. Ramkumar: Support Vector Machine Based Automatic Classification of Human Brain Using MR Image Features. International Journal of Computational Intelligence and Applications 6(3): 357-370 (2006)

Ling Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages. The Journal of Supercomputing 35(1): 93-113 (2006)

Henry Selvaraj, Lech Józwiak: Reconfigurable embedded systems: Synthesis, design and application. Journal of Systems Architecture 51(6-7): 347-349 (2005)

Venkatesan Muthukumar, Bharath Radhakrishnan, Henry Selvaraj: Multiple voltage and frequency scheduling for power minimization. Journal of Systems Architecture 51(6-7): 382-394 (2005)

Mariusz Rawski, Henry Selvaraj, Tadeusz Luba: An application of functional decomposition in ROM-based FSM implementation in FPGA devices. Journal of Systems Architecture 51(6-7): 424-434 (2005)

Mariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba: Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures. DSD 2005: 460-466

Henry Selvaraj, Pawel Tomaszewicz, Mariusz Rawski, Tadeusz Luba: Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems. ITCC (2) 2005: 22-27

Mariusz Rawski, Henry Selvaraj, Pawel Morawiecki: Efficient Method of Input Variable Partitioning in Functional Decomposition Based on Evolutionary Algorithms. DSD 2004: 136-143

Jianhong Li, Laxmi Gewali, Henry Selvaraj, Muthukumar Venkatesan: Hybrid Greedy/Face Routing for Ad-Hoc Sensor Network. DSD 2004: 574-578

Piotr Sapiecha, Henry Selvaraj, Jaroslaw Stanczak, Krzysztof Sep, Tadeusz Luba: A Hybrid Approach to a Classification Problem. Intelligent Information Systems 2004: 99-106

Ling Wang, Yingtao Jiang, Henry Selvaraj: Synthesis scheme for low power designs with multiple supply voltages by tabu search. ISCAS (5) 2004: 261-264

Ling Wang, Yingtao Jiang, Henry Selvaraj: Synthesis Scheme for Low Power Designs with Multiple Supply Voltages by Heuristic Algorithms. ITCC (2) 2004: 829-833

Mariusz Rawski, Henry Selvaraj, Tadeusz Luba: An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. DSD 2003: 104-111

Ling Wang, Henry Selvaraj: A Scheduling and Partitioning Scheme for Low Power Circuit Operating at Multiple Voltages. DSD 2003: 144-147

Michal Pleban, Hubert Niewiadomski, Piotr Buciak, Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba: NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables. DSD 2003: 248-254

Ling Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and Optimal Voltage Selection with Multiple Supply Voltages under Resource Constraints. VLSI 2003: 272-278

Muthukumar Venkatesan, Henry Selvaraj: Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation. VLSI Design 2003: 51-57

Ling Wang, Henry Selvaraj: Performance Driven Circuit Clustering and Partitioning. ITCC 2002: 352-354

Henry Selvaraj, Mariusz Rawski, Tadeusz Luba: FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. ITCC 2002: 355-360

Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba: Functional Decomposition and Its Applications in Machine Learning and Neural Networks. International Journal of Computational Intelligence and Applications 1(3): 259-271 (2001)

Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj: A variable partition approach for disjoint decomposition. ISCAS (5) 2001: 157-162

Muthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj: An Improved Column Compatibility Approach for Partition Based Functional Decomposition. EUROMICRO 2000: 1067-

Henry Selvaraj, B. Li: A Parameter to Measure the Efficiency of FPGA Based Logic Synthesis Tools. EUROMICRO 2000: 1212-

Piotr Sapiecha, Henry Selvaraj, Michal Pleban: Decomposition of Boolean Relations and Functions in Logic Synthesis and Data Analysis. Rough Sets and Current Trends in Computing 2000: 487-494

Henry Selvaraj, Muthukumar Venkatesan: A Reconfiguarable Printed Character Recognition System Using a Logic Synthesis Tool. EUROMICRO 1998: 10024-

Henry Selvaraj, Miroslawa Nowicka, Tadeusz Luba: Decomposition Strategies and their Performance in Fpga-Based Technology Mapping. VLSI Design 1998: 388-393