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 | 2005 | |
|---|---|---|
| j1 |      | Soha Hassoun, Murali Kudlugi, Duaine Pryor, Charles Selvidge: A transaction-based unified architecture for simulation and emulation. IEEE Trans. VLSI Syst. 13(2): 278-287 (2005) |
| c5 |  | |
| 2001 | ||
| c4 | | Murali Kudlugi, Soha Hassoun, Charles Selvidge, Duaine Pryor: A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification. DAC 2001: 623-628 |
| c3 | | Murali Kudlugi, Charles Selvidge, Russell Tessier: Static Scheduling of Multiple Asynchronous Domains For Functional Verification. DAC 2001: 647-652 |
| c2 | | Murali Kudlugi, Charles Selvidge, Russell Tessier: Static Scheduling of Multi-Domain Memories For Functional Verification. ICCAD 2001: 2-9 |
| 1995 | ||
| c1 | | Charles Selvidge, Anant Agarwal, Matthew Dahl, Jonathan Babb: TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation. FPGA 1995: 25-31 |
| 1 | Anant Agarwal | |
| 2 | Jonathan Babb | |
| 3 | Matthew Dahl | |
| 4 | Amit Gupta | |
| 5 | Soha Hassoun | |
| 6 | Murali Kudlugi | |
| 7 | Duaine Pryor | |
| 8 | Russell Tessier |
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