Jorge Semião

Jackson Pachito, Celestino V. Martins, B. Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Aging-Aware Power or Frequency Tuning With Predictive Fault Detection. IEEE Design & Test of Computers 29(5): 27-36 (2012)

Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits. J. Electronic Testing 28(4): 421-434 (2012)

Jackson Pachito, Celestino V. Martins, Jorge Semião, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: The influence of clock-gating on NBTI-induced delay degradation. IOLTS 2012: 61-66

Judit Freijedo, María Dolores Valdés, Lucía Costas, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Lower V_DD Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing. J. Low Power Electronics 7(2): 185-198 (2011)

R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications. J. Low Power Electronics 7(4): 562-572 (2011)

Vasco Bexiga, Carlos Leong, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira, María Dolores Valdés, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas: Performance Failure Prediction Using Built-In Delay Sensors in FPGAs. FPL 2011: 301-304

Celestino V. Martins, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors. VTS 2011: 203-208

Judit Freijedo, Lucía Costas, Jorge Semião, Juan J. Rodríguez-Andina, María José Moure, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Impact of Power Supply Voltage Variations on FPGA-Based Digital Systems Performance. J. Low Power Electronics 6(2): 339-349 (2010)

Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira: Predictive error detection by on-line aging monitoring. IOLTS 2010: 9-14

Raul Chipana, Leticia Maria Veiras Bolzani, Fabian Vargas, Jorge Semião, Juan J. Rodríguez-Andina, Isabel C. Teixeira, Paulo J. Teixeira: Investigating the Use of BICS to detect resistive-open defects in SRAMs. IOLTS 2010: 200-201

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. IOLTS 2009: 223-228

Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira: Signal Integrity Enhancement in Digital Circuits. IEEE Design & Test of Computers 25(5): 452-461 (2008)

Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, Paulo J. Teixeira: Delay Modeling for Power Noise and Temperature-Aware Design and Test of Digital Systems. J. Low Power Electronics 4(3): 385-391 (2008)

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Paulo J. Teixeira: Time Management for Low-Power Design of Digital Systems. J. Low Power Electronics 4(3): 410-419 (2008)

Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. IOLTS 2008: 227-232

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300

Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172

Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212

F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. DDECS 2006: 279-284

Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. IOLTS 2006: 257-262

Yervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octávio Páscoa Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher: Embedded tutorial: TRP: integrating embedded test and ATE. DATE 2001: 34-37

Octávio Páscoa Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Quality of Electronic Design: From Architectural Level to Test Coverage. ISQED 2000: 197-