Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Barry Shackleford
2000 – 2009
- 2002
[c6]Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider: High-Performance Cellular Automata Random Number Generators for Embedded Probabilistic Computing Systems. Evolvable Hardware 2002: 191-200- [c5]Barry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider: FPGA implementation of neighborhood-of-four cellular automata random number generators. FPGA 2002: 106-112
- 2001
- [j1]Barry Shackleford, Greg Snider, Richard J. Carter, Etsuko Okushi, Mitsuhiro Yasuda, Katsuhiko Seo, Hiroto Yasuura: A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine. Genetic Programming and Evolvable Machines 2(1): 33-60 (2001)
- [c4]Greg Snider, Barry Shackleford, Richard J. Carter: Attacking the semantic gap between application programming languages and configurable hardware. FPGA 2001: 115-124
- 2000
- [c3]Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura: An FPGA-based genetic algorithm machine (poster abstract). FPGA 2000: 218
1990 – 1999
- 1998
- [c2]Mitsuhiro Yasuda, Katsuhiko Seo, Hisao Koizumi, Barry Shackleford, Fumio Suzuki: A Top-down Hardware/Software Co-Simulation Method for Embedded Systems Based Upon a Component Logical Bus Architecture. ASP-DAC 1998: 169-175
- 1997
- [c1]Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura: Memory-CPU Size Optimization for Embedded System Designs. DAC 1997: 246-251
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-05-01 22:58 CEST by the dblp team