| 2003 | ||
|---|---|---|
| c1 | John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas: Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. DAC 2003: 688-690 | |
| 1 | Jaeha Kim | |
| 2 | John G. Maneatis | |
| 3 | Jay Maxey | |
| 4 | Iain McClatchie |
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