John Paul Shen

Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen, Hong Wang, John Paul Shen: Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices. IEEE Trans. Parallel Distrib. Syst. 19(7): 914-925 (2008)

Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan Rakvic, Hong Wang, John Paul Shen: Multiple Instruction Stream Processor. ISCA 2006: 114-127

Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Pat Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb: Die Stacking (3D) Microarchitecture. MICRO 2006: 469-479

John Paul Shen, Margaret Martonosi (Eds.): Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006. ACM 2006, isbn 1-59593-451-0

Satish Narayanasamy, Hong Wang, Perry H. Wang, John Paul Shen, Brad Calder: A Dependency Chain Clustered Microarchitecture. IPDPS 2005

Murali Annavaram, Ed Grochowski, John Paul Shen: Mitigating Amdahl's Law through EPI Throttling. ISCA 2005: 298-309

Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen: Helper Threads via Virtual Multithreading. IEEE Micro 24(6): 74-82 (2004)

Partha Kundu, Murali Annavaram, Trung A. Diep, John Paul Shen: A case for shared instruction cache on chip multiprocessors running OLTP. SIGARCH Computer Architecture News 32(3): 11-18 (2004)

Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen: Helper threads via virtual multithreading on an experimental itanium^® 2 processor-based platform. ASPLOS 2004: 144-155

Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John Paul Shen: Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. CGO 2004: 27-38

Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen: Hardware Support for Prescient Instruction Prefetch. HPCA 2004: 84-95

Ed Grochowski, Ronny Ronen, John Paul Shen, Hong Wang: Best of Both Latency and Throughput. ICCD 2004: 236-243

Richard A. Hankins, Trung A. Diep, Murali Annavaram, Brian Hirano, Harald Eri, Hubert Nueckel, John Paul Shen: Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice. MICRO 2003: 151-164

Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang, John Paul Shen: A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS 2003: 13-24

R. David Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen: Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors. Interaction between Compilers and Computer Architectures 2002: 57-67

Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul Shen: Non-Vital Loads. HPCA 2002: 165-174

Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen: Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation. HPCA 2002: 187-196

Murali Annavaram, Trung A. Diep, John Paul Shen: Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors. ICCD 2002: 242-248

Shih-Wei Liao, Perry H. Wang, Hong Wang, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery: Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. PLDI 2002: 117-128

Noppanunt Utamaphethai, Ronald D. Blanton, John Paul Shen: Relating buffer-oriented microarchitecture validation to high-level pipeline functionality. HLDVT 2001: 3-8

Perry H. Wang, Hong Wang, Ralph-Michael Kling, Kalpana Ramakrishnan, John Paul Shen: Register Renaming and Scheduling for Dynamic Execution of Predicated Code. HPCA 2001: 15-25

John Paul Shen: Clear and Present Tensions in Microprocessor Design. ICCD 2001: 4-4

Deepak Limaye, Ryan Rakvic, John Paul Shen: Parallel Cachelets. ICCD 2001: 284-292

Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen: Speculative precomputation: long-range prefetching of delinquent loads. ISCA 2001: 14-25

Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen: Dynamic speculative precomputation. MICRO 2001: 306-317

Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen: Effectiveness of Microarchitecture Test Program Generation. IEEE Design & Test of Computers 17(4): 38-49 (2000)

Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen: A Buffer-Oriented Methodology for Microarchitecture Validation. J. Electronic Testing 16(1-2): 49-65 (2000)

Ryan Rakvic, Bryan Black, John Paul Shen: Completion time multiple branch prediction for enhancing trace cache performance. ISCA 2000: 47-58

Yuan C. Chou, John Paul Shen: Instruction path coprocessors. ISCA 2000: 270-281

Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen: PipeRench implementation of the instruction path coprocessor. MICRO 2000: 147-158

Jonathan Combs, Candice Bechem Combs, John Paul Shen: Mispredicted Path Cache Effects. Euro-Par 1999: 1322-1231

Yuan C. Chou, Jason Fung, John Paul Shen: Reducing branch misprediction penalties via dynamic control independence detection. International Conference on Supercomputing 1999: 109-118

Bryan Black, Bohuslav Rychlik, John Paul Shen: The Block-Based Trace Cache. ISCA 1999: 196-207

Alexander G. Dean, John Paul Shen: System-Level Issues for Software Thread Integration: Guest Triggering and Host Selection. RTSS 1999: 234

Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen: Superscalar Processor Validation at the Microarchitecture Level. VLSI Design 1999: 300-305

Bryan Black, John Paul Shen: Calibration of Microprocessor Performance Models. IEEE Computer 31(5): 59-65 (1998)

Mikko H. Lipasti, John Paul Shen: Exploiting Value Locality to Exceed the Dataflow Limit. International Journal of Parallel Programming 26(4): 505-538 (1998)

Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen: Efficacy and Performance Impact of Value Prediction. IEEE PACT 1998: 148-

Alexander G. Dean, John Paul Shen: Hardware to Software Migration with Real-Time Thread Integration. EUROMICRO 1998: 10243-

Bryan Black, Brian Mueller, Stephanie Postal, Ryan Rakvic, Noppanunt Utamaphethai, John Paul Shen: Load Execution Latency Reduction. International Conference on Supercomputing 1998: 29-36

Alexander G. Dean, John Paul Shen: Techniques for Software Thread Integration in Real-Time Embedded Systems. RTSS 1998: 322-333

Mikko H. Lipasti, John Paul Shen: Superspeculative Microarchitecture for Beyond AD 2000. IEEE Computer 30(9): 59-66 (1997)

Chris J. Newburn, John Paul Shen: Post-pass partitioning of signal processing programs. International Journal of Parallel Programming 25(4): 245-280 (1997)

Mikko H. Lipasti, John Paul Shen: The Performance Potential of Value and Dependence Prediction. Euro-Par 1997: 1043-1052

Yuan C. Chou, Daniel P. Siewiorek, John Paul Shen: A Realistic Study on Multithreaded Superscalar Processor Design. Euro-Par 1997: 1092-1101

Derek B. Noonburg, John Paul Shen: A Framework for Statistical Modeling of Superscalar Processor Performance. HPCA 1997: 298-309

Chris J. Newburn, John Paul Shen: Compiler Support for Low-Cost Synchronization Among Threads. PARCO 1997: 485-494

Chris J. Newburn, John Paul Shen: Automatic partitioning of signal processing programs for symmetric multiprocessors. IEEE PACT 1996: 269-280

Andrew S. Huang, John Paul Shen: The Intrinsic Bandwidth Requirements of Ordinary Programs. ASPLOS 1996: 105-114

Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen: Value Locality and Load Value Prediction. ASPLOS 1996: 138-147

Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen: Can Trace-Driven Simulators Accurately Predict Superscalar Performance? ICCD 1996: 478-485

Mikko H. Lipasti, John Paul Shen: Exceeding the Dataflow Limit via Value Prediction. MICRO 1996: 226-237

Trung A. Diep, John Paul Shen: VMW: A Visualization-Based Microarchitecture Workbench. IEEE Computer 28(12): 57-64 (1995)

Trung A. Diep, John Paul Shen: Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures. FTCS 1995: 100-109

Trung A. Diep, Christopher Nelson, John Paul Shen: Performance Evaluation of the PowerPC 620 Microarchitecture. ISCA 1995: 163-175

Andrew S. Huang, John Paul Shen: A limit study of local memory requirements using value reuse profiles. MICRO 1995: 71-81

Michael A. Schuette, John Paul Shen: Exploiting Instruction-Level Parallelism for Integrated Control-Flow Monitoring. IEEE Trans. Computers 43(2): 129-140 (1994)

Chris J. Newburn, Derek B. Noonburg, John Paul Shen: A PDG-based Tool and its Use in Analyzing Program Control Dependences. IFIP PACT 1994: 157-168

Andrew S. Huang, Gert Slavenburg, John Paul Shen: Speculative Disambiguation: A Compilation Technique for Dynamic Memory Disambiguation. ISCA 1994: 200-210

Derek B. Noonburg, John Paul Shen: Theoretical modeling of superscalar processor performance. MICRO 1994: 52-62

Michael A. Schuette, John Paul Shen: Instruction-level experimental evaluation of the Multiflow TRACE 14/300 VLIW computer. The Journal of Supercomputing 7(1-2): 249-271 (1993)

Trung A. Diep, Mikko H. Lipasti, John Paul Shen: Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000. ICCD 1993: 86-93

Chris J. Newburn, Andrew S. Huang, John Paul Shen: Balancing Fine- and Medium-Grained Parallelism in Scheduling Loops for the XIMD Architecture. Architectures and Compilation Techniques for Fine and Medium Grain Parallelism 1993: 39-52

Trung A. Diep, John Paul Shen, Mike Phillip: EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors. MICRO 1993: 225-235

Scott H. Robinson, John Paul Shen: Direct Methods for Synthesis of Self-Monitoring State Machines. FTCS 1992: 306-315

Andrew Wolfe, John Paul Shen: A Variable Instruction Stream Extension to the VLIW Architecture. ASPLOS 1991: 2-14

Michael A. Schuette, John Paul Shen: Exploiting Instruction-Level Resource Parallelism for Transparent, Integrated Control-Flow Monitoring. FTCS 1991: 318-325

Chriss Stephens, Bryce Cogswell, John Heinlein, Gregory Palmer, John Paul Shen: Instruction Level Profiling and Evaluation of the IBM/6000. ISCA 1991: 180-189

Michael A. Schuette, John Paul Shen: An Instruction-Level Performance Analysis of the Multiflow TRACE 14/300. MICRO 1991: 2-11

Mauricio Breternitz Jr., John Paul Shen: Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors. MICRO 1991: 114-123

Kent D. Wilken, John Paul Shen: Continuous signature monitoring: low-cost concurrent detection of processor control errors. IEEE Trans. on CAD of Integrated Circuits and Systems 9(6): 629-641 (1990)

Mauricio Breternitz Jr., John Paul Shen: Architecture Synthesis of High-Performance Application-Specific Processors. DAC 1990: 542-548

Scott H. Robinson, John Paul Shen: Evaluation and Synthesis of Self-Monitoring State Machines. ICCAD 1990: 276-279

F. Joel Ferguson, John Paul Shen: A CMOS fault extractor for inductive fault analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 7(11): 1181-1194 (1988)

Andrew Wolfe, Mauricio Breternitz Jr., Chriss Stephens, A. L. Ting, D. B. Kirk, Ronald P. Bianchini Jr., John Paul Shen: The White Dwarf: A High-Performance Application-Specific Processor. ISCA 1988: 212-222

John Paul Shen, F. Joel Ferguson: Extraction and Simulation of Realistic CMOS Faults Using Inductive Fault Analysis. ITC 1988: 475-484

Kent D. Wilken, John Paul Shen: Continuous Signature Monitoring: Efficient Concurrent-Detection of Processor Control Errors. ITC 1988: 914-925

Andrew Wolfe, John Paul Shen: Flexible processors: a promising application-specific processor design approach. MICRO 1988: 30-39

Mauricio Breternitz Jr., John Paul Shen: Organization of array data for concurrent memory access. MICRO 1988: 97-99

Michael A. Schuette, John Paul Shen: Processor Control Flow Monitoring Using Signatured Instruction Streams. IEEE Trans. Computers 36(3): 264-276 (1987)

Ronald P. Bianchini Jr., John Paul Shen: Interprocessor Traffic Scheduling Algorithm for Multiple-Processor Networks. IEEE Trans. Computers 36(4): 396-409 (1987)

John Paul Shen, John P. Hayes, Luigi Ciminiera, Angelo Serra: Fault-tolerance and performance analysis of beta-networks. Parallel Computing 3(3): 231-249 (1986)

John Paul Shen: Highlights of CMU Research on CAD, CAM, CAT of VLSI Circuits. FJCC 1986: 878-889

Patrick P. Fasang, Michael A. Schuette, John Paul Shen, William A. Gwaltney: Automated Design for Testability of Semicustom Integrated Circuits. ITC 1985: 558-564

John Paul Shen, John P. Hayes: Fault-Tolerance of Dynamic-Full-Access Interconnection Networks. IEEE Trans. Computers 33(3): 241-248 (1984)

John Paul Shen, F. Joel Ferguson: The Design of Easily Tastabel VLSI Array Multipliers. IEEE Trans. Computers 33(6): 554-560 (1984)

Wojciech Maly, F. Joel Ferguson, John Paul Shen: Systematic Characterization of Physical Defects for Fault Analysis of MOS IC Cells. ITC 1984: 390-399

F. Joel Ferguson, John Paul Shen: The design of two easily-testable VLSI array multipliers. IEEE Symposium on Computer Arithmetic 1983: 2-9

David C. H. Lee, John Paul Shen: Easily-Testable (N, K) Shuffle/Exchange Networks. ICPP 1983: 65-70

Michael A. Schuette, John Paul Shen: On-Line Self-Monitoring Using Signatured Instruction Streams. ITC 1983: 275-282

John Paul Shen: Fault tolerance analysis of several interconnection networks. ICPP 1982: 101-112

John Paul Shen, John P. Hayes: Fault Tolerance of a Class of Connecting Networks. ISCA 1980: 61-71