Soichi Shigeta

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	2006
c3		Soichi Shigeta, Nobutaka Imamura, Haruyasu Ueda, Hiromichi Kobashi, Miho Murata, Taketoshi Yoshida, Atsushi Kubota, Akira Asato, Yoshimasa Kadooka: Grid Service Platform: Design and Implementation of Grid Middleware for Telecom Carriers. e-Science 2006: 110
	2003
c2		Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa: On the Design of a Register Queue Based Processor Architecture (FaRM-rq). ISPA 2003: 248-262
	2002
c1		Masahiro Sowa, Ben A. Abderazek, Soichi Shigeta, Kirilka Nikolova, Tsutomu Yoshinaga: Proposal and Design of a Parallel Queue Processor Architecture (PQP). IASTED PDCS 2002: 549-554
	2001
j1		Soichi Shigeta, Kentaro Shimizu, Masahiro Sowa: Access route control by an extended key/lock scheme. Comput. Syst. Sci. Eng. 16(5): 319-325 (2001)

Coauthor Index

1	Ben A. Abderazek (Ben Abdallah Abderazek)	[c2] [c1]
2	Akira Asato	[c3]
3	Nobutaka Imamura	[c3]
4	Yoshimasa Kadooka	[c3]
5	Hiromichi Kobashi	[c3]
6	Atsushi Kubota	[c3]
7	Miho Murata	[c3]
8	Kirilka Nikolova	[c1]
9	Kentaro Shimizu	[j1]
10	Masahiro Sowa	[c2] [c1] [j1]
11	Haruyasu Ueda	[c3]
12	Taketoshi Yoshida	[c3]
13	Tsutomu Yoshinaga	[c2] [c1]

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