Kotaro Shimamura

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	2012
c4		Yasuo Sato, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yukiya Miura, Satosni Untake, Takumi Hasegawa, Motoyuki Sato, Kotaro Shimamura: DART: Dependable VLSI test architecture and its implementation. ITC 2012: 1-10
	2006
c3		Kotaro Shimamura, Takeshi Takehara, Yosuke Shima, Kunihiko Tsunedomi: A Single-Chip Fail-Safe Microprocessor with Memory Data Comparison Feature. PRDC 2006: 359-368
	1998
c2		Kotaro Shimamura, Yuichiro Morita, Yoshitaka Takahashi, Takashi Hotta, Shigeta Ueda, Mikiya Nohara, Mitsuyasu Kido, Seji Tanaka, Kazuhiro Imaie, Koji Sakamoto, Tatsuhito Nakajima: A Triple Redundant Controller which Adopts the Time-Sharing Fault Recovery Method and its Application to a Power Converter Controller. IEEE Real Time Technology and Applications Symposium 1998: 210-
	1995
c1		Kotaro Shimamura, Shigeya Tanaka, Tetsuya Shimomura, Takashi Hotta, Eiki Kamada, Hideo Sawamoto, Teruhisa Shimizu, Kisaburo Nakazawa: A superscalar RISC processor with pseudo vector processing feature. ICCD 1995: 102-109

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