| 2000 | ||
|---|---|---|
| j2 | Ranjan V. Sonalkar, Richard R. Shively: An efficient bit-loading algorithm for DMT applications. IEEE Communications Letters 4(3): 80-82 (2000) | |
| 1989 | ||
| c1 | Richard R. Shively, E. B. Morgan, T. W. Copley, Allen L. Gorin: A high performance reconfigurable parallel processing architecture. SC 1989: 505-509 | |
| 1982 | ||
| j1 | Richard R. Shively: Architecture of a Programmable Digital Signal Processor. IEEE Trans. Computers 31(1): 16-22 (1982) | |
| 1 | T. W. Copley | |
| 2 | Allen L. Gorin | |
| 3 | E. B. Morgan | |
| 4 | Ranjan V. Sonalkar |
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