Sandeep Kumar Shukla
List of publications from the DBLP Bibliography Server - FAQ| 2013 | ||
|---|---|---|
| c105 | Bin Xue, Prosenjit Chatterjee, Sandeep K. Shukla: Simplification of C-RTL equivalent checking for fused multiply add unit using intermediate models. ASP-DAC 2013: 723-728 | |
| c104 | Jean-Pierre Talpin, Jens Brandt, Mike Gemünde, Klaus Schneider, Sandeep K. Shukla: Constructive Polychronous Systems. LFCS 2013: 335-349 | |
| 2012 | ||
| j54 | Hua Lin, Santhosh S. Veda, Sandeep K. Shukla, Lamine Mili, James Thorp: GECO: Global Event-Driven Co-Simulation Framework for Interconnected Power System and Communication Network. IEEE Trans. Smart Grid 3(3): 1444-1456 (2012) | |
| c103 | Shravan Garlapati, Sandeep K. Shukla: Formal Verification of Hierarchically Distributed Agent Based Protection Scheme in Smart Grid. SPIN 2012: 137-154 | |
| 2011 | ||
| j53 | Prabhat Mishra, Zeljko Zilic, Sandeep K. Shukla: Guest Editors' Introduction: Multicore SoC Validation with Transaction-Level Models. IEEE Design & Test of Computers 28(3): 6-9 (2011) | |
| j52 | Zeljko Zilic, Prabhat Mishra, Sandeep K. Shukla: Challenges of Rapidly Emerging Consumer Space Multiprocessors. IEEE Design & Test of Computers 28(3): 52-53 (2011) | |
| j51 | Sandeep K. Shukla, Prabhat Mishra, Zeljko Zilic: A Brief History of Multiprocessors and EDA. IEEE Design & Test of Computers 28(3): 96 (2011) | |
| j50 | Sandeep K. Shukla, Jean-Pierre Talpin: Guest Editors' Introduction: Special Section on Science of Design for Safety Critical Systems. IEEE Trans. Computers 60(8): 1057-1058 (2011) | |
| c102 | Jens Brandt, Mike Gemunde, Klaus Schneider, Sandeep K. Shukla, Jean-Pierre Talpin: Integrating system descriptions by clocked guarded actions. FDL 2011: 1-8 | |
| c101 | Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla: High Level Power Estimation Models for FPGAs. ISVLSI 2011: 7-12 | |
| c100 | Bijoy A. Jose, Abdoulaye Gamatié, Julien Ouy, Sandeep K. Shukla: SMT based false causal loop detection during code synthesis from Polychronous specifications. MEMOCODE 2011: 109-118 | |
| e2 | Zeljko Zilic, Sandeep K. Shukla (Eds.): 2011 IEEE International High Level Design Validation and Test Workshop, HLDVT 2011, Napa Valley, CA, USA, November 9-11, 2011. IEEE 2011, isbn 978-1-4577-1744-4 | |
| 2010 | ||
| b3 | Gaurav Singh, Sandeep Kumar Shukla: Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications. Springer 2010, isbn 978-1-4419-6480-9, pp. I-XXIX, 1-153 | |
| j49 | Bin Xue, Sandeep K. Shukla: Analysis of Scheduled Latency Insensitive Systems with Periodic Clock Calculus. J. Electronic Testing 26(2): 227-242 (2010) | |
| j48 | Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla: Power Aware High Level Synthesis of Hardware Coprocessors. J. Low Power Electronics 6(3): 376-389 (2010) | |
| c99 | Bijoy A. Jose, Jason Pribble, Sandeep K. Shukla: Faster Software Synthesis Using Actor Elimination Techniques for Polychronous Formalism. ACSD 2010: 147-156 | |
| c98 | Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep K. Shukla: The Model Checking View to Clock Gating and Operand Isolation. ACSD 2010: 181-190 | |
| c97 | Bijoy A. Jose, Sandeep K. Shukla: An alternative polychronous model and synthesis methodology for model-driven embedded software. ASP-DAC 2010: 13-18 | |
| c96 | Mahesh Nanjundappa, Hiren D. Patel, Bijoy A. Jose, Sandeep K. Shukla: SCGPSim: a fast SystemC simulator on GPUs. ASP-DAC 2010: 149-154 | |
| c95 | Sumit Ahuja, Wei Zhang, Sandeep K. Shukla: System level simulation guided approach to improve the efficacy of clock-gating. HLDVT 2010: 9-16 | |
| c94 | ||
| c93 | Avinash Lakshminarayana, Sumit Ahuja, Sandeep K. Shukla: Coprocessor design space exploration using high level synthesis. ISQED 2010: 879-884 | |
| c92 | Jens Brandt, Klaus Schneider, Sandeep K. Shukla: Translating concurrent action oriented specifications to synchronous guarded actions. LCTES 2010: 47-56 | |
| c91 | Bin Xue, Sandeep K. Shukla, S. S. Ravi: Minimizing back pressure for latency insensitive system synthesis. MEMOCODE 2010: 189-198 | |
| c90 | Sumit Ahuja, Wei Zhang, Avinash Lakshminarayana, Sandeep K. Shukla: A Methodology for Power Aware High-Level Synthesis of Co-processors from Software Algorithms. VLSI Design 2010: 282-287 | |
| 2009 | ||
| b2 | Deepak Mathaikutty, Sandeep Kumar Shukla: Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design. Artech House 2009, isbn 978-1-59693-424-5, pp. I-XXI, 1-287 | |
| j47 | Sandeep K. Shukla: Model-Driven Engineering and Safety-Critical Embedded Software. IEEE Computer 42(9): 93-95 (2009) | |
| j46 | Alberto L. Sangiovanni-Vincentelli, Sandeep K. Shukla, Janos Sztipanovits, Guang Yang, Deepak Mathaikutty: Metamodeling: An Emerging Representation Paradigm for System-Level Design. IEEE Design & Test of Computers 26(3): 54-69 (2009) | |
| j45 | Sandeep K. Shukla: Metamodeling: What is it good for? IEEE Design & Test of Computers 26(3): 96 (2009) | |
| j44 | Sumit Ahuja, Swathi T. Gurumani, Chad Spackman, Sandeep K. Shukla: Hardware Coprocessor Synthesis from an ANSI C Specification. IEEE Design & Test of Computers 26(4): 58-67 (2009) | |
| j43 | Bijoy A. Jose, Hiren D. Patel, Sandeep K. Shukla, Jean-Pierre Talpin: Generating Multi-Threaded code from Polychronous Specifications. Electr. Notes Theor. Comput. Sci. 238(1): 57-69 (2009) | |
| j42 | ||
| j41 | Bin Xue, Sandeep K. Shukla: Modeling and Analyzing the Implementation of Latency-Insensitive Protocols Using the Polychrony Framework. Electr. Notes Theor. Comput. Sci. 245: 3-22 (2009) | |
| j40 | Bijoy A. Jose, Bin Xue, Sandeep K. Shukla: An Analysis of the Composition of Synchronous Systems. Electr. Notes Theor. Comput. Sci. 245: 69-84 (2009) | |
| j39 | Sandeep K. Shukla: Guest editorial: IEEE/ACM symposium on nanoscale architectures (NANOARCH07). JETC 5(1) (2009) | |
| j38 | Gaurav Singh, Jacob B. Schwartz, Sandeep K. Shukla: A Formally Verified Peak-Power Reduction Technique for Hardware Synthesis from Concurrent Action-Oriented Specifications. J. Low Power Electronics 5(2): 135-144 (2009) | |
| j37 | Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla: SCoPE: Statistical Regression Based Power Models for Co-Processors Power Estimation. J. Low Power Electronics 5(4): 407-415 (2009) | |
| c89 | Bijoy A. Jose, Jason Pribble, Lemaire Stewart, Sandeep K. Shukla: EmCodeSyn: A visual framework for multi-rate data flow specifications and code synthesis for embedded applications. FDL 2009: 1-6 | |
| c88 | Edgar G. Daylight, Sandeep K. Shukla: On the Difficulties of Concurrent-System Design, Illustrated with a 2×2 Switch Case Study. FM 2009: 273-288 | |
| c87 | Bin Xue, Sandeep K. Shukla: Analysis of scheduled Latency insensitive systems with periodic clock calculus. HLDVT 2009: 1-7 | |
| c86 | Sumit Ahuja, Sandeep K. Shukla: MCBCG: Model Checking Based Sequential Clock-Gating. HLDVT 2009: 20-25 | |
| c85 | Yue Ma, Jean-Pierre Talpin, Sandeep K. Shukla, Thierry Gautier: Distributed Simulation of AADL Specifications in a Polychronous Model of Computation. ICESS 2009: 607-614 | |
| c84 | Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar: Power estimation methodology for a high-level synthesis framework. ISQED 2009: 541-546 | |
| c83 | Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla: Accurate power estimation of hardware co-processors using system level simulation. SoCC 2009: 399-402 | |
| c82 | Edgar G. Daylight, Sandeep K. Shukla, Davide Sergio: Expressing the Behavior of Three Very Different Concurrent Systems by Using Natural Extensions of Separation Logic. EXPRESS 2009: 26-40 | |
| 2008 | ||
| j36 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Design Autom. for Emb. Sys. 12(1-2): 1-30 (2008) | |
| j35 | Deepak Mathaikutty, Sandeep K. Shukla: Mining metadata for composability of IPs from SystemC IP library. Design Autom. for Emb. Sys. 12(1-2): 63-94 (2008) | |
| j34 | Christoph Grimm, Axel Jantsch, Sandeep Kumar Shukla, Eugenio Villar: C-Based Design of Heterogeneous Embedded Systems. EURASIP J. Emb. Sys. 2008 (2008) | |
| j33 | Hiren D. Patel, Sandeep K. Shukla: Model-Driven Validation of SystemC Designs. EURASIP J. Emb. Sys. 2008 (2008) | |
| j32 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla: Dataflow Architectures for GALS. Electr. Notes Theor. Comput. Sci. 200(1): 33-50 (2008) | |
| j31 | Hiren D. Patel, Sandeep K. Shukla: On Cosimulating Multiple Abstraction-Level System-Level Models. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 394-398 (2008) | |
| j30 | Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja: MMV: A Metamodeling Based Microprocessor Validation Environment. IEEE Trans. VLSI Syst. 16(4): 339-352 (2008) | |
| j29 | Deepak Mathaikutty, Sandeep K. Shukla: MCF: A Metamodeling-Based Component Composition Framework - Composing SystemC IPs for Executable System Models. IEEE Trans. VLSI Syst. 16(7): 792-805 (2008) | |
| j28 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla: A Trace-Based Framework for Verifiable GALS Composition of IPs. IEEE Trans. VLSI Syst. 16(9): 1176-1186 (2008) | |
| c81 | Syed Suhaib, Bijoy A. Jose, Sandeep K. Shukla, Deepak Mathaikutty: Formal Transformation of a KPN Specification to a GALS Implementation. FDL 2008: 84-89 | |
| c80 | Bijoy A. Jose, Sandeep K. Shukla, Hiren D. Patel, Jean-Pierre Talpin: On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications. MEMOCODE 2008: 129-138 | |
| c79 | Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla: Applying Verification Collaterals for Accurate Power Estimation. MTV 2008: 61-66 | |
| c78 | Gaurav Singh, Sandeep K. Shukla: Verifying Compiler Based Refinement of BluespecTM. SPIN 2008: 250-269 | |
| 2007 | ||
| j27 | Michael Kishinevsky, Sandeep K. Shukla, Ken S. Stevens: Guest Editors' Introduction: GALS Design and Validation. IEEE Design & Test of Computers 24(5): 414-416 (2007) | |
| j26 | Gaurav Singh, Sandeep K. Shukla: Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS). IJES 3(1/2): 83-92 (2007) | |
| j25 | Gaurav Singh, Jacob B. Schwartz, Sumit Ahuja, Sandeep K. Shukla: Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented Specifications. J. Low Power Electronics 3(2): 156-166 (2007) | |
| j24 | Sandy Irani, Sandeep K. Shukla, Rajesh Gupta: Algorithms for power savings. ACM Transactions on Algorithms 3(4) (2007) | |
| j23 | Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi: Heterogeneous Behavioral Hierarchy Extensions for SystemC. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 765-780 (2007) | |
| j22 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3) (2007) | |
| c77 | ||
| c76 | Gaurav Singh, S. S. Ravi, Sumit Ahuja, Sandeep K. Shukla: Complexity of Scheduling in Synthesizing Hardware from Concurrent Action Oriented Specifications. Power-aware Computing Systems 2007 | |
| c75 | Hiren D. Patel, Sandeep K. Shukla: Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL. DATE 2007: 279-284 | |
| c74 | Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar: Design fault directed test generation for microprocessor validation. DATE 2007: 761-766 | |
| c73 | Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla: A Metamodeling based Framework for Architectural Modeling and Simulator Generation. FDL 2007: 210-218 | |
| c72 | Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla: Model-driven test generation for system level validation. HLDVT 2007: 83-90 | |
| c71 | ||
| c70 | Edgar G. Daylight, Sandeep K. Shukla: Local Causal Reasoning of a Safety-Critical Subway System. MEMOCODE 2007: 83-84 | |
| c69 | Eric Simpson, Pengyuan Yu, Patrick Schaumont, Sumit Ahuja, Sandeep K. Shukla: VT Matrix Multiply Design for MEMOCODE '07. MEMOCODE 2007: 95-96 | |
| c68 | Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar: Assertion-Based Modal Power Estimation. MTV 2007: 3-7 | |
| c67 | Gaurav Singh, Sandeep K. Shukla: Model Checking Bluespec Specified Hardware Designs. MTV 2007: 39-43 | |
| c66 | Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja: Model Based Test Generation for Microprocessor Architecture Validation. VLSI Design 2007: 465-472 | |
| c65 | Debayan Bhaduri, Sandeep K. Shukla, Paul S. Graham, Maya Gokhale: Scalable techniques and tools for reliability analysis of large circuits. VLSI Design 2007: 705-710 | |
| e1 | Twan Basten, Gabriel Juhás, Sandeep K. Shukla (Eds.): Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic. IEEE Computer Society 2007, isbn 978-0-7695-2902-8 | |
| 2006 | ||
| j21 | Sandeep K. Shukla, Carl Pixley, Gary Smith: Guest Editors' Introduction: The True State of the Art of ESL Design. IEEE Design & Test of Computers 23(5): 335-337 (2006) | |
| j20 | Ken S. Stevens, Sandeep K. Shukla, Montek Singh, Jean-Pierre Talpin: Preface. Electr. Notes Theor. Comput. Sci. 146(2): 1-3 (2006) | |
| j19 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin: A Functional Programming Framework for Latency Insensitive Protocol Validation. Electr. Notes Theor. Comput. Sci. 146(2): 169-188 (2006) | |
| j18 | Sandeep K. Shukla, Michael Theobald: Special issue on formal methods for globally asynchronous and locally synchronous (GALS) systems. Formal Methods in System Design 28(2): 91-92 (2006) | |
| j17 | Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla: Validating Families of Latency Insensitive Protocols. IEEE Trans. Computers 55(11): 1391-1401 (2006) | |
| j16 | Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla: CARH: service-oriented architecture for validating system-level designs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1458-1474 (2006) | |
| c64 | Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Valerie E. Taylor, Paul S. Graham, Maya Gokhale: A hybrid framework for design and analysis of fault-tolerant architectures. DATE 2006: 335-336 | |
| c63 | Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi: Heterogeneous behavioral hierarchy for system level designs. DATE 2006: 565-570 | |
| c62 | Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede: Design with race-free hardware semantics. DATE 2006: 571-576 | |
| c61 | Deepak Mathaikutty, Sandeep K. Shukla: Mining Metadata for Composability of IPs from SystemC IP Library. FDL 2006: 143-151 | |
| c60 | Deepak Mathaikutty, Sandeep K. Shukla: MCF: A Metamodeling-based Visual Component Composition Framework. FDL 2006: 367-375 | |
| c59 | Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja: MMV: Metamodeling Based Microprocessor Valiation Environment. HLDVT 2006: 143-148 | |
| c58 | Sandeep K. Shukla, Alan J. Hu, Jacob Abrahams, Pranav Ashar, Harry Foster, Avner Landver, Carl Pixley: Panel: Assertion-Based Verification -What's the Big Deal? HLDVT 2006: 183 | |
| c57 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, Jean-Pierre Talpin: Polychronous Methodology For System Design: A True Concurrency Approach. HLDVT 2006: 211-214 | |
| c56 | Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil: A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design. MEMOCODE 2006: 39-48 | |
| c55 | Gaurav Singh, Sandeep K. Shukla: Low-power hardware synthesis from TRS-based specifications. MEMOCODE 2006: 49-58 | |
| c54 | Hiren D. Patel, Sandeep K. Shukla: Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. MTV 2006: 68-75 | |
| c53 | Deepak Mathaikutty, Sandeep K. Shukla: SoC Design Space Exploration through Automated IP Selection from SystemC IP Library. SoCC 2006: 109-110 | |
| c52 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla: A Trace Based Framework for Validation of SoC Designs with GALS Systems. SoCC 2006: 247-250 | |
| 2005 | ||
| j15 | R. Iris Bahar, Mehdi Baradaran Tahoori, Sandeep K. Shukla, Fabrizio Lombardi: Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale. IEEE Design & Test of Computers 22(4): 295-297 (2005) | |
| j14 | Juliana Küster Filipe, Iman Poernomo, Ralf Reussner, Sandeep K. Shukla: Preface. Electr. Notes Theor. Comput. Sci. 141(3): 1-2 (2005) | |
| j13 | Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla, Rajesh Gupta: Using probabilistic model checking for dynamic power management. Formal Asp. Comput. 17(2): 160-176 (2005) | |
| j12 | Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh Gupta: A Compositional Behavioral Modeling Framework for Embedded System Design and Conformance Checking. International Journal of Parallel Programming 33(6): 613-643 (2005) | |
| j11 | Hiren D. Patel, Sandeep K. Shukla: Towards a heterogeneous simulation kernel for system-level models: a SystemC kernel for synchronous data flow models. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1261-1271 (2005) | |
| j10 | Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla: Evaluating the reliability of NAND multiplexing with PRISM. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1629-1637 (2005) | |
| j9 | Sandeep K. Shukla, Jean-Pierre Talpin: Guest editorial: Special issue on models and methodologies for co-design of embedded systems. ACM Trans. Embedded Comput. Syst. 4(2): 225-227 (2005) | |
| j8 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner: XFM: An incremental methodology for developing formal models. ACM Trans. Design Autom. Electr. Syst. 10(4): 589-609 (2005) | |
| j7 | Sandy Irani, Gaurav Singh, Sandeep K. Shukla, Rajesh K. Gupta: An overview of the competitive and adversarial approaches to designing dynamic power management strategies. IEEE Trans. VLSI Syst. 13(12): 1349-1361 (2005) | |
| p1 | Hiren D. Patel, Sumit Gupta, Sandeep K. Shukla, Rajesh Gupta: An Introductory Survey of Networked Embedded Systems. The Industrial Information Technology Handbook 2005: 0- | |
| c51 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303 | |
| c50 | Hiren D. Patel, Sandeep K. Shukla: Towards Behavioural Hierarchy Extensions for SystemC. FDL 2005: 361-373 | |
| c49 | David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla: SystemCXML: An Exstensible SystemC Front end Using XML. FDL 2005: 405-409 | |
| c48 | Jean-Pierre Talpin, Sandeep Kumar Shukla: Automated clock inference for stream function-based system level specifications. HLDVT 2005: 63-70 | |
| c47 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner: Validating families of latency insensitive protocols. HLDVT 2005: 127-134 | |
| c46 | Shivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoungwoo Lee, Minyoung Kim, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau, Sandeep K. Shukla, Nalini Venkatasubramanian: A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems. IPDPS 2005 | |
| c45 | Nicolae Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Improving SystemC simulation through Petri net reductions. MEMOCODE 2005: 131-140 | |
| c44 | Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede: Extended abstract: a race-free hardware modeling language. MEMOCODE 2005: 255-256 | |
| c43 | ||
| c42 | David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla: Automated Extraction of Structural Information from SystemC-based IP for Validation. MTV 2005: 99-104 | |
| c41 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla: System Level Design Methodology for System On Chips using Multi-Threaded Graphs. SoCC 2005: 133-136 | |
| c40 | Luca Benini, Sandeep K. Shukla, Rajesh K. Gupta: Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems. VLSI Design 2005: 18- | |
| 2004 | ||
| b1 | Hiren D. Patel, Sandeep Kumar Shukla: SystemC Kernel extensions for heterogeneous system modeling - a framework for multi-MoC modeling and simulation. Kluwer 2004, isbn 978-1-4020-8087-6, pp. I-XXXII, 1-172 | |
| j6 | Hans-Joachim Wunderlich, Sandeep K. Shukla: Panel Summaries. IEEE Design & Test of Computers 21(1): 65-66 (2004) | |
| j5 | Juliana Küster Filipe, Iman Poernomo, Ralf Reussner, Sandeep K. Shukla: Preface. Electr. Notes Theor. Comput. Sci. 108: 1-2 (2004) | |
| j4 | Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Frederic Doucet, Rajesh K. Gupta: Formal Refinement Checking in a System-level Design Methodology. Fundam. Inform. 62(2): 243-273 (2004) | |
| c39 | Jean-Pierre Talpin, David Berner, Sandeep K. Shukla, Paul Le Guernic, Abdoulaye Gamatié, Rajesh Gupta: A Behavioral Type Inference System for Compositional System-on-Chip Design. ACSD 2004: 47-56 | |
| c38 | David Berner, Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla: Modular design through component abstraction. CASES 2004: 202-211 | |
| c37 | Mohammad Reza Mousavi, Paul Le Guernic, Jean-Pierre Talpin, Sandeep K. Shukla, Twan Basten: Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks. DATE 2004: 384-389 | |
| c36 | Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla: A Functional Programming Framework of Heterogeneous Model of Computation for System Design. FDL 2004: 586-598 | |
| c35 | Debayan Bhaduri, Sandeep K. Shukla: NANOPRISM: a tool for evaluating granularity vs. reliability trade-offs in nano architectures. ACM Great Lakes Symposium on VLSI 2004: 109-112 | |
| c34 | Hiren D. Patel, Sandeep K. Shukla: Towards a heterogeneous simulation kernel for system level models: a SystemC kernel for synchronous data flow models. ACM Great Lakes Symposium on VLSI 2004: 248-253 | |
| c33 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla: Effects of property ordering in an incremental formal modeling methodology. HLDVT 2004: 89-94 | |
| c32 | Debayan Bhaduri, Sandeep K. Shukla: NANOLAB: A Tool for Evaluating Reliability of Defect-Tolerant Nano Architectures. ISVLSI 2004: 25-31 | |
| c31 | Hiren D. Patel, Sandeep K. Shukla: Towards a Heterogeneous Simulation Kernel for System Level Models: A SystemC Kernel for Synchronous Data Flow Models. ISVLSI 2004: 241-242 | |
| c30 | Sandeep K. Shukla, Tevfik Bultan, Constance L. Heitmeyer: Panel: given that hardware verification has been an uphill battle, what is the future of software verification? MEMOCODE 2004: 157-158 | |
| c29 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner: Extreme Formal Modeling (XFM) for Hardware Models. MTV 2004: 30-35 | |
| c28 | Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla: Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking. VLSI Design 2004: 907- | |
| 2003 | ||
| j3 | Frederic Doucet, Sandeep K. Shukla, Masato Otsuka, Rajesh K. Gupta: BALBOA: a component-based design environment for system models. IEEE Trans. on CAD of Integrated Circuits and Systems 22(12): 1597-1612 (2003) | |
| j2 | Sandy Irani, Sandeep K. Shukla, Rajesh K. Gupta: Online strategies for dynamic power management in systems with multiple power-saving states. ACM Trans. Embedded Comput. Syst. 2(3): 325-346 (2003) | |
| c27 | Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet: Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. ACSD 2003: 9-19 | |
| c26 | Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupta: Typing abstractions and management in a component framework. ASP-DAC 2003: 115-122 | |
| c25 | Rajesh K. Gupta, Shishpal Rawat, Sandeep K. Shukla, Brian Bailey, Daniel K. Beece, Masahiro Fujita, Carl Pixley, John O'Leary, Fabio Somenzi: Formal verification - prove it or pitch it. DAC 2003: 710-711 | |
| c24 | Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupta: Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated. DATE 2003: 10382-10387 | |
| c23 | Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet: Polychrony for Refinement-Based Design. DATE 2003: 11172-11173 | |
| c22 | Sandeep K. Shukla, Ramesh Karri, Seth Copen Goldstein, Forrest Brewer, Kaustav Banerjee, Sankar Basu: Nano, quantum, and molecular computing: are we ready for the validation and test challenges? HLDVT 2003: 3-7 | |
| c21 | Rajesh K. Gupta, Sandy Irani, Sandeep K. Shukla: Formal Methods for Dynamic Power Management. ICCAD 2003: 874-882 | |
| c20 | Radu Cornea, Nikil D. Dutt, Rajesh K. Gupta, Ingolf Krüger, Alexandru Nicolau, Douglas C. Schmidt, Sandeep K. Shukla: FORGE: A Framework for Optimization of Distributed Embedded Systems Software. IPDPS 2003: 208 | |
| c19 | Grant Martin, Sandeep K. Shukla: Hierarchical and Incremental Verification for System Level Design: Challenges and Accomplishments. MEMOCODE 2003: 97- | |
| c18 | Rajesh K. Gupta, Sandeep K. Shukla: Should the space of implementation possibilities be determined by the abilities of high-level synthesis and validation? MEMOCODE 2003: 277- | |
| c17 | ||
| c16 | Sandeep K. Shukla, Jean-Pierre Talpin, Stephen A. Edwards, Rajesh K. Gupta: High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap. VLSI Design 2003: 9-14 | |
| 2002 | ||
| c15 | Sandy Irani, Rajesh K. Gupta, Sandeep K. Shukla: Competitive Analysis of Dynamic Power Management Strategies for Systems with Multiple Power Savings States. DATE 2002: 117-123 | |
| c14 | Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupta, Masato Otsuka: An Environment for Dynamic Component Composition for Efficient Co-Design . DATE 2002: 736-743 | |
| c13 | Nick Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Automated Concurrency Re-Assignment in High Level System Models for Efficient System-Level Simulation. DATE 2002: 875-881 | |
| c12 | Sandeep K. Shukla, Frederic Doucet, Rajesh K. Gupta: Structured Component Composition Frameworks for Embedded System Design. HiPC 2002: 663-678 | |
| c11 | Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla, Rajesh K. Gupta: Formal analysis and validation of continuous-time Markov chain based system level power management strategies. HLDVT 2002: 45-50 | |
| c10 | Mohammad Reza Mousavi, Giovanni Russello, Michel R. V. Chaudron, Michel A. Reniers, Twan Basten, Angelo Corsaro, Sandeep K. Shukla, Rajesh K. Gupta, Douglas C. Schmidt: Using Aspect-GAMMA in the design of embedded systems. HLDVT 2002: 69-74 | |
| c9 | Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu: Efficient Simulation of Synthesis-Oriented System Level Designs. ISSS 2002: 168-173 | |
| c8 | Nick Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Concurrency in System Level Design: Conflict Between Simulation and Synthesis Goals. IWLS 2002: 407-411 | |
| 2001 | ||
| j1 | Ronald H. Hardin, Robert P. Kurshan, Sandeep K. Shukla, Moshe Y. Vardi: A New Heuristic for Bad Cycle Detection Using BDDs. Formal Methods in System Design 18(2): 131-140 (2001) | |
| c7 | Sandeep K. Shukla, Rajesh K. Gupta: A model checking approach to evaluating system level dynamic power management policies for embedded systems. HLDVT 2001: 53-57 | |
| c6 | Frederic Doucet, Rajesh K. Gupta, Masato Otsuka, Patrick Schaumont, Sandeep K. Shukla: Interoperability as a design issue in C++ based modeling environments. ISSS 2001: 87-92 | |
| 1999 | ||
| c5 | A. Saxena, Sandeep Kumar Shukla, Robert Weihmayer, P. Wu: A Case Study in CORBA-based Event Management for Correlation Across Network Management Servers in a Centralized Network Operation. PDPTA 1999: 2685-2691 | |
| 1998 | ||
| c4 | Qing Guo, Paliath Narendran, Sandeep K. Shukla: Unification and Matching in Process Algebras. RTA 1998: 91-105 | |
| 1996 | ||
| c3 | Sandeep K. Shukla, Harry B. Hunt III, Daniel J. Rosenkrantz: HORNSAT, Model Checking, Verification and games (Extended Abstract). CAV 1996: 99-110 | |
| c2 | Sandeep K. Shukla, Harry B. Hunt III, Daniel J. Rosenkrantz, Richard Edwin Stearns: On the Complexity of Relational Problems for Finite State Processes (Extended Abstract). ICALP 1996: 466-477 | |
| c1 | Sandeep K. Shukla, Harry B. Hunt III, Daniel J. Rosenkrantz, S. S. Ravi, Richard Edwin Stearns: I/O Automata Based Verification of Finite State Distributed Systems: Complexity Issues (Abstract). PODC 1996: 122 | |
Colors in the list of coauthors
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