| 2013 | ||
|---|---|---|
| j2 | David F. Bacon, Rodric M. Rabbah, Sunil Shukla: FPGA programming for the masses. Commun. ACM 56(4): 56-63 (2013) | |
| j1 | David F. Bacon, Rodric M. Rabbah, Sunil Shukla: FPGA Programming for the Masses. ACM Queue 11(2): 40 (2013) | |
| c13 | Perry Cheng, Stephen J. Fink, Rodric M. Rabbah, Sunil Shukla: The Liquid Metal IP bridge. ASP-DAC 2013: 313-319 | |
| 2012 | ||
| c12 | Joshua S. Auerbach, David F. Bacon, Ioana Burcea, Perry Cheng, Stephen J. Fink, Rodric M. Rabbah, Sunil Shukla: A compiler and runtime for heterogeneous computing. DAC 2012: 271-276 | |
| c11 | David F. Bacon, Perry Cheng, Sunil Shukla: And then there were none: a stall-free real-time garbage collector for reconfigurable hardware. PLDI 2012: 23-34 | |
| 2011 | ||
| c10 | Joshua S. Auerbach, David F. Bacon, Perry Cheng, Rodric M. Rabbah, Sunil Shukla: Virtualization of heterogeneous machines hardware description in a synthesizable object-oriented language. DAC 2011: 890-894 | |
| 2010 | ||
| c9 | Sunil Shukla, Rodric M. Rabbah, Martin Vorbach: FPGA-based combined architecture for stream categorization and intrusion detection. MEMOCODE 2010: 77-80 | |
| 2008 | ||
| c8 | Sunil Shukla, Neil W. Bergmann, Jürgen Becker: A Web Server Based Edge Detector Implementation in FPGA. ISVLSI 2008: 441-446 | |
| 2007 | ||
| c7 | Sunil Shukla, Neil W. Bergmann, Jürgen Becker: QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks. IPDPS 2007: 1-7 | |
| 2006 | ||
| c6 | Sunil Shukla, Neil W. Bergmann, Jürgen Becker: QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection. ARC 2006: 93-98 | |
| c5 | Sunil Shukla, Neil W. Bergmann, Jürgen Becker: QUKU: A Coarse Grained Paradigm for FPGAs. Dynamically Reconfigurable Architectures 2006 | |
| c4 | Carlos Morra, M. Sackmann, Sunil Shukla, Jürgen Becker, Reiner W. Hartenstein: From Equation to VHDL: Using Rewriting Logic for Automated Function Generation. FPL 2006: 1-4 | |
| c3 | Sunil Shukla, Neil W. Bergmann, Jürgen Becker: QUKU: A Two-Level Reconfigurable Architecture. ISVLSI 2006: 109-116 | |
| 2004 | ||
| c2 | Sunil Shukla, Neil W. Bergmann: Single bit error correction implementation in CRC-16 on FPGA. FPT 2004: 319-322 | |
| 2002 | ||
| c1 | Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil Shukla: A Fault Modeling Technique to Test Memory BIST Algorithms. MTDT 2002: 109-116 | |
Colors in the list of coauthors
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