 | 2013 |
| c8 |  | James D. Warnock, Yuen H. Chan, Hubert Harrer, David L. Rude, Ruchir Puri, Sean M. Carey, Gerard Salem, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, Adam Jatkowski, Gerald Strevig, Leon J. Sigal, Ayan Datta, Anne Gattiker, Aditya Bansal, Doug Malone, Thomas Strach, Huajun Wen, Pak-kin Mak, Chung-Lung Shum, Donald W. Plass, Charles F. Webb: 5.5GHz system z microprocessor and multi-chip module. ISSCC 2013: 46-47 |
| 2011 |
| c7 |  | James D. Warnock, Yuen H. Chan, William V. Huott, Sean M. Carey, Michael F. Fee, Huajun Wen, M. J. Saccamango, Frank Malgioglio, Patrick J. Meaney, Donald W. Plass, Y. Chan, Mark D. Mayo, Guenter Mayer, Leon J. Sigal, David L. Rude, Robert M. Averill III, M. Wood, Thomas Strach, Howard H. Smith, Brian W. Curran, Eric M. Schwarz, Lee Eisen, Doug Malone, Steve Weitzel, Pak-kin Mak, Thomas J. McPherson, Charles F. Webb: A 5.2GHz microprocessor chip for the IBM zEnterprise™ system. ISSCC 2011: 70-72 |
| 2010 |
| j5 |  | |
| c6 |  | |
| 2007 |
| j4 |  | |
| 2006 |
| c5 |  | |
| 1999 |
| j3 |  | Robert M. Averill III, Keith G. Barkley, Michael A. Bowen, Peter J. Camporese, Allan H. Dansky, Robert F. Hatch, Dale E. Hoffman, Mark D. Mayo, Scott A. McCabe, Timothy G. McNamara, Thomas J. McPherson, Gregory A. Northrop, Leon J. Sigal, Howard H. Smith, David A. Webber, Patrick M. Williams: Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors. IBM Journal of Research and Development 43(5): 681-706 (1999) |
| 1998 |
| c4 |  | Dale E. Hoffman, Robert M. Averill III, Brian W. Curran, Yuen H. Chan, Allan H. Dansky, Robert F. Hatch, Timothy G. McNamara, Thomas J. McPherson, Gregory A. Northrop, Leon J. Sigal, Anthony Pelella, Patrick M. Williams: Deep submicron design techniques for the 500 MHz IBM S/390 G5 custom microprocessor. ICCD 1998: 258-263 |
| 1997 |
| j2 |  | |
| j1 |  | Leon J. Sigal, James D. Warnock, Brian W. Curran, Yuen H. Chan, Peter J. Camporese, Mark D. Mayo, William V. Huott, Daniel R. Knebel, Ching-Te Chuang, James P. Eckhardt, Philip T. Wu: Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor. IBM Journal of Research and Development 41(4&5): 489-504 (1997) |
| c3 |  | |
| c2 |  | |
| 1988 |
| c1 |  | |