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 | 2013 | |
|---|---|---|
| j2 |      | Jawar Singh, N. Vijaykrishnan: A highly reliable NBTI Resilient 6T SRAM cell. Microelectronics Reliability 53(4): 565-572 (2013) |
| 2012 | ||
| j1 | | Saraju P. Mohanty, Jawar Singh, Elias Kougianos, Dhiraj K. Pradhan: Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM. Integration 45(1): 33-45 (2012) |
| c12 | | G. K. Reddy, Kapil Jainwal, Jawar Singh, Saraju P. Mohanty: Process variation tolerant 9T SRAM bitcell design. ISQED 2012: 493-497 |
| 2010 | ||
| c11 | | Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dhiraj K. Pradhan: A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead. ISQED 2010: 131-138 |
| 2009 | ||
| c10 | | Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew: Single ended 6T SRAM with isolated read-port for low-power embedded systems. DATE 2009: 917-922 |
| c9 | | Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan: Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. VLSI Design 2009: 307-312 |
| 2008 | ||
| c8 | | Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan: Fault Tolerant Reversible Finite Field Arithmetic Circuits. IOLTS 2008: 188-189 |
| c7 | | Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan: Fault tolerant bit parallel finite field multipliers using LDPC codes. ISCAS 2008: 1684-1687 |
| c6 | | Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan: A nano-CMOS process variation induced read failure tolerant SRAM cell. ISCAS 2008: 3334-3337 |
| c5 | | Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan: Pseudo parallel architecture for AES with error correction. SoCC 2008: 187-190 |
| c4 | | Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies. SoCC 2008: 243-246 |
| c3 | | Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: Failure analysis for ultra low power nano-CMOS SRAM under process variations. SoCC 2008: 251-254 |
| 2007 | ||
| c2 | | Jawar Singh, Jimson Mathew, Mohammad Hosseinabady, Dhiraj K. Pradhan: Single Event Upset Detection and Correction. ICIT 2007: 13-18 |
| c1 | | Babita R. Jose, P. Mythili, Jawar Singh, Jimson Mathew: A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards. ICIT 2007: 127-132 |
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