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Kostas Siozios
K. Siozios
2010 – today
- 2013
[j13]Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: On supporting rapid exploration of memory hierarchies onto FPGAs. Journal of Systems Architecture - Embedded Systems Design 59(2): 78-90 (2013)- 2012
- [j12]Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris: A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric. TRETS 5(1): 4 (2012)
- [j11]Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris: A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems. VLSI Design 2012 (2012)
- [c40]Kostas Siozios, Dimitrios Soudris: A low-cost fault tolerant solution targeting to commercial FPGA devices. AHS 2012: 46-53
- [c39]Dionysios Diamantopoulos, Kostas Siozios, George Lentaris, Dimitrios Soudris, Marcos Avilés Rodrigálvarez: SPARTAN project: On profiling computer vision algorithms for rover navigation. AHS 2012: 174-181
- [c38]George Lentaris, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez: Hardware implementation of stereo correspondence algorithm for the ExoMars mission. FPL 2012: 667-670
- [c37]Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner: On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation. IPDPS Workshops 2012: 328-335
- 2011
- [j10]Kostas Siozios, Dimitrios Rodopoulos, Dimitrios Soudris: On Supporting Rapid Thermal Analysis. Computer Architecture Letters 10(2): 53-56 (2011)
- [j9]Kostas Siozios, Dimitrios Soudris: A Tabu-Based Partitioning and Layer Assignment Algorithm for 3-D FPGAs. Embedded Systems Letters 3(3): 97-100 (2011)
- [c36]Kostas Siozios, Dimitrios Rodopoulos, Dimitrios Soudris: Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs. ARCS Workshops 2011
- [c35]Kostas Siozios, Dimitrios Soudris: Trading Fault-Masking with Performance Overhead for FPGAs. ARCS Workshops 2011
- [c34]Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Framework for Architecture-Level Exploration of Communication Intensive Applications onto 3-D FPGAs. FPL 2011: 30-33
- [c33]Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs. FPL 2011: 238-243
- [c32]Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, K. Siozios, Jürgen Becker: A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. IPDPS Workshops 2011: 143-149
- [c31]Kostas Siozios, Antonis Papanikolaou, Dimitrios Soudris: CAD tools for designing 3D integrated systems. ISCAS 2011: 2229-2232
- [c30]Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Framework for Architecture-Level Exploration of 3-D FPGA Platforms. PATMOS 2011: 298-307
- [c29]Kostas Siozios, Dionysios Diamantopoulos, Ioannis Kostavelis, Evangelos Boukas, Lazaros Nalpantidis, Dimitrios Soudris, Antonios Gasteratos, Marcos Avilés, Iraklis Anagnostopoulos: SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications. ReCoSoC 2011: 1-9
- [c28]Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris: Thermal optimization for micro-architectures through selective block replication. ICSAMOS 2011: 59-66
- 2010
- [j8]Kostas Siozios, Dimitrios Soudris: A Methodology for Alleviating the Performance Degradation of TMR Solutions. Embedded Systems Letters 2(4): 111-114 (2010)
- [j7]Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation for FPGA Architectures. Journal of Circuits, Systems, and Computers 19(3): 701-717 (2010)
- [c27]Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos: A Framework for Enabling Fault Tolerance in Reconfigurable Architectures. ARC 2010: 257-268
- [c26]Alienor Richard, Dragomir Milojevic, Frédéric Robert, Alexandros Bartzas, Antonis Papanikolaou, Kostas Siozios, Dimitrios Soudris: Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's. ARCS Workshops 2010: 319-324
- [c25]Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: NAROUTO: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAS. ICECS 2010: 527-530
- [c24]Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris: Multiple Vdd on 3D NoC architectures. ICECS 2010: 831-834
- [c23]Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris: A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd. ISVLSI 2010: 444-445
- [c22]Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos: Towards Supporting Fault-Tolerance in FPGAs. ISVLSI 2010: 446-447
2000 – 2009
- 2009
- [j6]Kostas Siozios, Dimitrios Soudris: Designing a novel high-performance FPGA architecture for data intensive applications. J. Real-Time Image Processing 4(2): 155-166 (2009)
- [c21]Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris: A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs. DATE 2009: 172-177
- 2008
- [j5]Kostas Siozios, Alexandros Bartzas, Dimitrios Soudris: Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology. Int. J. Reconfig. Comp. 2008 (2008)
- [j4]Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays. J. Low Power Electronics 4(1): 34-47 (2008)
- [j3]Kostas Siozios, Dimitrios Soudris: A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs. J. Low Power Electronics 4(3): 275-289 (2008)
- [c20]Kostas Siozios, Dimitrios Soudris: An Efficient Approach for Managing Power Consumption Hotspots Distribution on 3D FPGAs. PATMOS 2008: 439-448
- 2007
- [c19]Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis: Designing Heterogeneous FPGAs with Multiple SBs. ARC 2007: 91-96
- [c18]Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris: Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support. FPL 2007: 652-655
- [c17]Kostas Siozios, Dimitrios Soudris: A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs. ISVLSI 2007: 55-60
- [c16]Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris: A software-supported methodology for designing high-performance 3D FPGA architectures. VLSI-SoC 2007: 54-59
- 2006
- [c15]K. Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis: A novel methodology for designing high-performance and low-energy FPGA routing architecture. FPGA 2006: 224
- [c14]Kostas Siozios, Dimitrios Soudris: Wire Segment Length and Switch Box Co-Optimization for FPGA Architectures. FPL 2006: 1-4
- [c13]Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications. IPDPS 2006
- [c12]Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis: A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications. ISCAS 2006
- [c11]Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. PATMOS 2006: 403-414
- [c10]Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique. VLSI-SoC 2006: 204-209
- 2005
- [j2]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos: A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Transactions 88-D(7): 1369-1380 (2005)
- [j1]Vasilios Kalenteridis, Haroula Pournara, K. Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, Ilias Pappas, George Koutroumpezis, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris: A complete platform and toolset for system implementation on fine-grain reconfigurable hardware. Microprocessors and Microsystems 29(6): 247-259 (2005)
- [c9]Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, K. Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis: AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. ASP-DAC 2005: 3-4
- [c8]Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, D. J. Soudris, Adonios Thanailakis: An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform. FPL 2005: 658-661
- [c7]Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis: A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow. FPL 2005: 707-708
- [c6]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and Its Software Tool Implementation. IPDPS 2005
- 2004
- [c5]K. Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. FPL 2004: 1116-1118
- [c4]Vasilios Kalenteridis, Haroula Pournara, K. Siozios, Konstantinos Tatas, George Koutroumpezis, Ilias Pappas, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris, Adonios Thanailakis: An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. IPDPS 2004
- 2003
- [c3]Konstantinos Tatas, K. Siozios, Dimitrios Soudris, Adonios Thanailakis: Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms. FPL 2003: 1032-1035
- [c2]Konstantinos Tatas, K. Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas: Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms. PATMOS 2003: 430-439
- [c1]Konstantinos Tatas, K. Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis, Stilianos Siskos, Adonios Thanailakis: FPGA Architecture Design and Toolset for Logic Implementation. PATMOS 2003: 607-616
Coauthor Index
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last updated on 2013-05-17 21:53 CEST by the dblp team