Ales Smrcka Coauthor index pubzone.org

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DBLP keys2007
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ales Smrcka, Tomás Vojnar: Verifying Parametrised Hardware Designs Via Counter Automata. Haifa Verification Conference 2007: 51-68
2006
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Ales Smrcka, Vojtech Rehák, Tomás Vojnar, David Safránek, Petr Matousek, Z. Rehák: Verifying VHDL Designs with Multiple Clocks in SMV. FMICS/PDMC 2006: 148-164
2005
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Petr Matousek, Ales Smrcka, Tomás Vojnar: High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design. CHARME 2005: 371-375

Coauthor Index

1Petr Matousek
[c2] [c1]
2Vojtech Rehák
[c2]
3Z. Rehák
[c2]
4David Safránek
[c2]
5Tomás Vojnar
[c3] [c2] [c1]
Last update Sat May 25 17:22:02 2013 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page