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 | 2013 | |
|---|---|---|
| j15 |      | Sangmin Kim, Gerald E. Sobelman: Scaling, Offset, and Balancing Techniques in FFT-Based BP Nonbinary LDPC Decoders. IEEE Trans. on Circuits and Systems 60-II(5): 277-281 (2013) |
| j14 | | Jing Wang, Yi Jiang, Gerald E. Sobelman: Iterative Computation of FIR MIMO MMSE-DFE With Flexible Complexity-Performance Tradeoff. IEEE Transactions on Signal Processing 61(9): 2394-2404 (2013) |
| 2012 | ||
| j13 | | Linkai Wang, Xiaofang Zhou, Gerald E. Sobelman, Ran Liu: Generic Mixed-Radix FFT Pruning. IEEE Signal Process. Lett. 19(3): 167-170 (2012) |
| c43 | | Hong Yang, Qing-qing Yang, Yuanwei Fang, Xiaofang Zhou, Gerald E. Sobelman: A novel hardware-oriented decoding algorithm for non-binary LDPC codes. APCCAS 2012: 400-403 |
| 2011 | ||
| j12 | | Wenqing Lu, Shuang Zhao, Xiaofang Zhou, J. Y. Ren, Gerald E. Sobelman: Reconfigurable baseband processing architecture for communication. IET Computers & Digital Techniques 5(1): 63-72 (2011) |
| j11 | | Sangmin Kim, Gerald E. Sobelman, Hanho Lee: A Reduced-Complexity Architecture for LDPC Layered Decoding Schemes. IEEE Trans. VLSI Syst. 19(6): 1099-1103 (2011) |
| c42 | | Kyung-Il Baek, Hanho Lee, Chang-Seok Choi, Sangmin Kim, Gerald E. Sobelman: A high-throughput LDPC decoder architecture for high-rate WPAN systems. ISCAS 2011: 1311-1314 |
| 2010 | ||
| j10 | | Shuang Zhao, Wenqing Lu, Xiaofang Zhou, Dian Zhou, Gerald E. Sobelman: Implementations of FFT and STBD for MIMO-OFDM on a Reconfigurable Baseband Platform. IEICE Transactions 93-D(4): 811-821 (2010) |
| j9 | | Fakhrul Zaman Rokhani, Gerald E. Sobelman: Bus Energy Consumption for Multilevel Signals. IEEE Trans. on Circuits and Systems 57-I(1): 64-71 (2010) |
| c41 | | Jie Yang, Gerald E. Sobelman: Frequency domain adaptive tap partial update adaptive algorithm for network echo cancellation. ICASSP 2010: 4046-4049 |
| 2009 | ||
| j8 | | Qingquan Zhang, Gerald E. Sobelman, Tian He: Gradient-based target localization in robotic sensor networks. Pervasive and Mobile Computing 5(1): 37-48 (2009) |
| c40 | | Woojoon Lee, Gerald E. Sobelman: Mesh-star Hybrid NoC Architecture with CDMA Switch. ISCAS 2009: 1349-1352 |
| 2008 | ||
| j7 | | Fakhrul Zaman Rokhani, Wen-Chih Kan, John C. Kieffer, Gerald E. Sobelman: Optimality of Bus-Invert Coding. IEEE Trans. on Circuits and Systems 55-II(11): 1134-1138 (2008) |
| c39 | | Wenqing Lu, Shuang Zhao, Chao Lu, Xiaofang Zhou, Gerald E. Sobelman: A heterogeneous reconfigurable baseband architecture for wireless LAN transceivers. EIT 2008: 284-288 |
| c38 | | Shuang Zhao, Wenqing Lu, Chao Lu, Xiaofang Zhou, Dian Zhou, Gerald E. Sobelman: An Efficient Multi-protocol RFID Interrogator Baseband Processor based on a Reconfigurable Architecture. ICESS 2008: 264-270 |
| c37 | | Qingquan Zhang, Yu Gu, Tian He, Gerald E. Sobelman: Cscan: A Correlation-based Scheduling Algorithm for Wireless Sensor Networks. ICNSC 2008: 1025-1030 |
| c36 | | Sangmin Kim, Gerald E. Sobelman, Hanho Lee: Adaptive quantization in min-sum based irregular LDPC decoder. ISCAS 2008: 536-539 |
| 2007 | ||
| c35 | | Wen-Chih Kan, Gerald E. Sobelman: MIMO Transceiver Design Based on a Modified Geometric Mean Decomposition. ISCAS 2007: 677-680 |
| c34 | | Wen-Chih Kan, Gerald E. Sobelman: High Speed Look-Ahead LMS Detector for MIMO Systems. SiPS 2007: 56-60 |
| 2006 | ||
| j6 | | Ebrahim Saberinia, K. C. Chang, Gerald E. Sobelman, Ahmed H. Tewfik: Implementation of a Multi-band Pulsed-OFDM Transceiver. VLSI Signal Processing 43(1): 73-88 (2006) |
| c33 | | Kai-Chuan Chang, Gerald E. Sobelman: FPGA-Based Design of a Pulsed-OFDM System. APCCAS 2006: 1128-1131 |
| c32 | | Fakhrul Zaman Rokhani, Gerald E. Sobelman: Low-Power Bus Transform Coding for Multilevel Signals. APCCAS 2006: 1272-1275 |
| c31 | | Wen-Chih Kan, Gerald E. Sobelman: Hardware channel model for ultra wideband systems. FPT 2006: 297-300 |
| c30 | | Kai-Chuan Chang, Gerald E. Sobelman: Noise Model Analysis of Optimized Mixed-Radix Structures for Pulsed OFDM. GLOBECOM 2006 |
| c29 | | Ming-Ta Hsieh, Gerald E. Sobelman: Modeling and verification of high-speed wired links with Verilog-AMS. ISCAS 2006 |
| c28 | | Daewook Kim, Manho Kim, Gerald E. Sobelman: DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs. ISCAS 2006 |
| c27 | | Manho Kim, Daewook Kim, Gerald E. Sobelman: Network-on-chip quality-of-service through multiprotocol label switching. ISCAS 2006 |
| c26 | | Daewook Kim, Manho Kim, Gerald E. Sobelman: NIUGAP: low latency network interface architecture with Gray code for networks-on-chip. ISCAS 2006 |
| c25 | | Manho Kim, Daewook Kim, Gerald E. Sobelman: Network-on-chip link analysis under power and performance constraints. ISCAS 2006 |
| c24 | | Qingquan Zhang, Gerald E. Sobelman, Tian He: Gradient-Driven Target Acquisition in Mobile Wireless Sensor Networks. MSN 2006: 365-376 |
| c23 | | Qingquan Zhang, Woong Cho, Gerald E. Sobelman, Liuqing Yang, Richard M. Voyles: TwinsNet: A Cooperative MIMO Mobile Sensor Network. UIC 2006: 508-516 |
| 2005 | ||
| c22 | | Daewook Kim, Manho Kim, Gerald E. Sobelman: FPGA-Based CDMA Switch for Networks-on-Chip. FCCM 2005: 283-284 |
| c21 | | Daewook Kim, Manho Kim, Gerald E. Sobelman: Parallel FFT computation with a CDMA-based network-on-chip. ISCAS (2) 2005: 1138-1141 |
| c20 | | Ming-Ta Hsieh, Gerald E. Sobelman: Clock and data recovery with adaptive loop gain for spread spectrum SerDes applications. ISCAS (5) 2005: 4883-4886 |
| 2004 | ||
| j5 | | Hanho Lee, Gerald E. Sobelman: VLSI Design Of Digit-Serial FPGA Architecture. Journal of Circuits, Systems, and Computers 13(1): 17-52 (2004) |
| c19 | | Kai-Chuan Chang, Gerald E. Sobelman, Ebrahim Saberinia, Ahmed H. Tewfik: Performance of N-tone sigma-delta modulators for UWB-OFDM. ICC 2004: 2483-2486 |
| c18 |  | Kai-Chuan Chang, Gerald E. Sobelman, Ebrahim Saberinia, Ahmed H. Tewfik: Analysis of higher-order N-tone sigma-delta modulators for ultra wideband communications. ISCAS (4) 2004: 113-116 |
| c17 | | Ming-Ta Hsieh, Gerald E. Sobelman: Simultaneous bidirectional signaling with adaptive pre-emphasis. ISCAS (4) 2004: 397-400 |
| c16 | | Kavitha Seshadri, Adrianne Pontarelli, Gauri Joglekar, Gerald E. Sobelman: Design techniques for Pulsed Static CMOS. ISCAS (2) 2004: 929-932 |
| c15 | | Ming-Ta Hsieh, Gerald E. Sobelman: Simultaneous bidirectional PAM-4 link with built-in self-test. SoCC 2004: 255-258 |
| 2003 | ||
| j4 | | Hanho Lee, Gerald E. Sobelman: Performance evaluation and optimal design for FPGA-based digit-serial DSP functions. Computers & Electrical Engineering 29(2): 357-377 (2003) |
| 2002 | ||
| c14 | | Sungwook Kim, Gerald E. Sobelman: Efficient digit-serial FIR filters with skew-tolerant domino. ISCAS (4) 2002: 369-372 |
| c13 | | Gunok Jung, V. A. Sundarajan, Gerald E. Sobelman: A robust self-resetting CMOS 32-bit parallel adder. ISCAS (1) 2002: 473-476 |
| c12 | | Gunok Jung, Jun Jin Kong, Gerald E. Sobelman, Keshab K. Parhi: High-speed add-compare-select units using locally self-resetting CMOS. ISCAS (1) 2002: 889-892 |
| 1999 | ||
| c11 | | Lijun Gao, Sarvesh Shrivastava, Gerald E. Sobelman: Elliptic Curve Scalar Multiplier Design Using FPGAs. CHES 1999: 257-268 |
| c10 | | Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman: A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor. FCCM 1999: 304-305 |
| 1998 | ||
| c9 | | |
| c8 | | Hanho Lee, Sarvesh Shrivastava, Gerald E. Sobelman: FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract). FPGA 1998: 257 |
| 1997 | ||
| c7 | | Hanho Lee, Gerald E. Sobelman: A New Low-Voltage Full Adder Circuit. Great Lakes Symposium on VLSI 1997: 88- |
| 1995 | ||
| c6 | | Gerald E. Sobelman, Donovan L. Raatz: Low-Power Multiplier Design Using Delayed Evaluation. ISCAS 1995: 1564-1567 |
| 1993 | ||
| j3 | | Ross Smith, Gerald E. Sobelman, George Luk, Koichi Suda, Jeff Bracken: A programmable floating-point cell for systolic signal processing. VLSI Signal Processing 5(1): 75-83 (1993) |
| 1991 | ||
| j2 | | Rob Smith, Gerald E. Sobelman: Simulation-based design of programmable systolic arrays. Computer-Aided Design 23(10): 669-675 (1991) |
| c5 | | E. Vandris, Gerald E. Sobelman: Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation. DAC 1991: 138-143 |
| c4 | | E. Vandris, Gerald E. Sobelman: A Mixed Functional/IDDQ Testing Methodology for CMOS Transistor Faults. ITC 1991: 608-614 |
| 1990 | ||
| c3 | | E. Vandris, Gerald E. Sobelman: Fast Switch-Level Fault Simulation Using Functional Fault Modeling. ICCAD 1990: 74-77 |
| 1986 | ||
| c2 | | David E. Krekelberg, Eugene Shragowitz, Gerald E. Sobelman, Li-Shin Lin: Automated layout synthesis in the YASC silicon compiler. DAC 1986: 447-453 |
| 1985 | ||
| c1 | | David E. Krekelberg, Gerald E. Sobelman, Chu S. Jhon: Yet another silicon compiler. DAC 1985: 176-182 |
| 1984 | ||
| j1 | | O. Melstrand, Eamonn O'Neill, Gerald E. Sobelman, D. Dokos: A Data Base Driven Automated System for MOS Device Characterization, Parameter Optimization and Modeling. IEEE Trans. on CAD of Integrated Circuits and Systems 3(1): 47-51 (1984) |
Colors in the list of coauthors
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