Jae-Cheol Son

Se-Hyun Yang, Jungyul Pyo, Youngmin Shin, Jae-Cheol Son: A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices. IEEE Communications Magazine 51(4): 94-98 (2013)

Youngmin Shin, Ken Shin, Prashant Kenkare, Rajesh Kashyap, Hoi-Jin Lee, Dongjoo Seo, Brian Millar, Yohan Kwon, Ravi Iyengar, Min-Su Kim, Ahsan Chowdhury, Sung-il Bae, Inpyo Hong, Wookyeong Jeong, Aaron Lindner, Ukrae Cho, Keith Hawkins, Jae-Cheol Son, Seung Ho Hwang: 28nm high- metal-gate heterogeneous quad-core CPUs for high-performance and energy-efficient mobile application processor. ISSCC 2013: 154-155

Se-Hyun Yang, Seogjun Lee, Jae Young Lee, Jeonglae Cho, Hoi-Jin Lee, Dongsik Cho, Junghun Heo, Sunghoon Cho, Youngmin Shin, Sunghee Yun, Euiseok Kim, Ukrae Cho, Edward Pyo, Man Hyuk Park, Jae-Cheol Son, Chinhyun Kim, Jeongnam Youn, Youngki Chung, Sungho Park, Seung Ho Hwang: A 32nm high-k metal gate application processor with GHz multi-core CPU. ISSCC 2012: 214-216

Rahul Singh, Jae-Cheol Son, Ukrae Cho, Gunok Jung, Min-Su Kim, Hyoungwook Lee, Suhwan Kim: A static-switching pulse domino technique for statistical power reduction of wide fan-in dynamic gates. ACM Great Lakes Symposium on VLSI 2011: 127-132