Javier Sosa

E. Fernández, A. Beriain, Héctor Solar, I. Rebollo, Andrés Garcia-Alonso, Javier Sosa, J. M. Monzón, S. García-Alonso, Juan A. Montiel-Nelson, Roc Berenguer: A low power voltage limiter for a full passive UHF RFID sensor on a 0.35 μm CMOS process. Microelectronics Journal 43(10): 708-713 (2012)

Javier Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi: A Genetic Algorithm Methodology to Find the Maximum Datapath Coverage for Combinational Logic Circuits. Journal of Circuits, Systems, and Computers 19(2): 435-450 (2010)

Javier Sosa, Juan A. Montiel-Nelson, Jose Carlos Garcia-Montesdeoca, Saeid Nooshabadi: Application of Mixed Integer Linear Programming in the Generation of Vectors with Maximum Datapath Coverage for Combinational Logic Circuits. Journal of Circuits, Systems, and Computers 19(7): 1497-1516 (2010)

Javier Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi: Application of genetic algorithm in computing the tradeoffs between power consumption versus delay in digital integrated circuit design. Microelectronics Journal 41(2-3): 135-141 (2010)

Jose Carlos Garcia-Montesdeoca, Juan A. Montiel-Nelson, Saeid Nooshabadi, Javier Sosa, Héctor Navarro: Bootstrapped Adiabatic Complementary Pass-Transistor Logic Driver Circuit for Large Capacitive Load and Low-energy Applications. DSD 2009: 196-199

Héctor Navarro, Saeid Nooshabadi, Juan A. Montiel-Nelson, Victor Navarro-Botello, Javier Sosa, José C. García: A geometric approach to register transfer level satisfiability. ISQED 2009: 272-275

R. Morales-Ramos, Javier Sosa, Juan A. Montiel-Nelson, A. Zwick, X. P. Nguyen: Movement recognition and strain lecture algorithm for fracture monitoring system. ISCAS 2006

José C. García, Juan A. Montiel-Nelson, Javier Sosa, Héctor Navarro: A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit. DATE 2004: 680-681

Javier Sosa, Juan A. Montiel-Nelson, Héctor Navarro, José C. García: Functional Vector Generation for Combinational Circuits Based on Data Path Coverage Metric and Mixed Integer Linear Programming. ISQED 2004: 217-222

Javier Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi: Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimization. ISCAS (5) 2001: 527-530

Saeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, Javier Sosa: A Single Phase Latch for High Speed GaAs Domino Circuits. DATE 2000: 760