Mircea R. Stan

Karthik Sankaranarayanan, Brett H. Meyer, Wei Huang, Robert J. Ribando, Hossein Haj-Hariri, Mircea R. Stan, Kevin Skadron: Architectural implications of spatial thermal filtering. Integration 46(1): 44-56 (2013)

Stuart N. Wooters, Adam C. Cabe, Zhenyu Qi, Jiajing Wang, Randy W. Mann, Benton H. Calhoun, Mircea R. Stan, Travis N. Blalock: Tracking On-Chip Age Using Distributed, Embedded Sensors. IEEE Trans. VLSI Syst. 20(11): 1974-1985 (2012)

Stevo D. Bailey, Mircea R. Stan: A new taxonomy for reconfigurable prefix adders. ISCAS 2012: 1227-1230

Mircea R. Stan, Mehdi Kabir, Jiwei Lu, Stuart A. Wolf: Self-assembled multiferroic magnetic QCA structures for low power systems. ISCAS 2012: 2525-2528

Gregory G. Faust, Runjie Zhang, Kevin Skadron, Mircea R. Stan, Brett H. Meyer: ArchFP: Rapid prototyping of pre-RTL floorplans. VLSI-SoC 2012: 183-188

Wei Huang, Malcolm Allen-Ware, John B. Carter, Mircea R. Stan, Edmund Cheng: Temperature-Aware Architecture: Lessons and Opportunities. IEEE Micro 31(3): 82-86 (2011)

Wei Huang, Karthick Rajamani, Mircea R. Stan, Kevin Skadron: Scaling with Design Constraints: Predicting the Future of Big Chips. IEEE Micro 31(4): 16-29 (2011)

Mehdi Kabir, Mircea R. Stan, Stuart A. Wolf, Ryan B. Comes, Jiwei Lu: RAMA: a self-assembled multiferroic magnetic QCA for low power systems. ACM Great Lakes Symposium on VLSI 2011: 25-30

Adam C. Cabe, Mircea R. Stan: Experimental demonstration of standby power reduction using voltage stacking in an 8Kb embedded FDSOI SRAM. ACM Great Lakes Symposium on VLSI 2011: 399-402

Clinton Wills Smullen IV, Vidyabhushan Mohan, Anurag Nigam, Sudhanva Gurumurthi, Mircea R. Stan: Relaxing non-volatility for fast and energy-efficient STT-RAM caches. HPCA 2011: 50-61

Clinton Wills Smullen IV, Anurag Nigam, Sudhanva Gurumurthi, Mircea R. Stan: The STeTSiMS STT-RAM simulation and modeling system. ICCAD 2011: 318-325

Anurag Nigam, Clinton Wills Smullen IV, Vidyabhushan Mohan, Eugene Chen, Sudhanva Gurumurthi, Mircea R. Stan: Delivering on the promise of universal memory for spin-transfer torque RAM (STT-RAM). ISLPED 2011: 121-126

Taniya Siddiqua, Sudhanva Gurumurthi, Mircea R. Stan: Modeling and analyzing NBTI in the presence of Process Variation. ISQED 2011: 28-35

Stuart A. Wolf, Jiwei Lu, Mircea R. Stan, Eugene Chen, Daryl M. Treger: The Promise of Nanomagnetics and Spintronics for Future Logic and Universal Memory. Proceedings of the IEEE 98(12): 2155-2168 (2010)

Jiajing Wang, Satyanand Nalam, Zhenyu Qi, Randy W. Mann, Mircea R. Stan, Benton H. Calhoun: Improving SRAM Vmin and yield by using variation-aware BTI stress. CICC 2010: 1-4

Adam C. Cabe, Zhenyu Qi, Mircea R. Stan: Stacking SRAM banks for ultra low power standby mode operation. DAC 2010: 699-704

Zhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan: SRAM-based NBTI/PBTI sensor system design. DAC 2010: 849-852

Vidyabhushan Mohan, Sudhanva Gurumurthi, Mircea R. Stan: FlashPower: A detailed power model for NAND flash memory. DATE 2010: 502-507

Zhenyu Qi, Brett H. Meyer, Wei Huang, Robert J. Ribando, Kevin Skadron, Mircea R. Stan: Temperature-to-power mapping. ICCD 2010: 384-389

Sudhanva Gurumurthi, Sriram Sankar, Mircea R. Stan: Using Intradisk Parallelism to Build Energy-Efficient Storage Systems. IEEE Micro 29(1): 50-61 (2009)

Sriram Sankar, Yan Zhang, Sudhanva Gurumurthi, Mircea R. Stan: Sensitivity-Based Optimization of Disk Architecture. IEEE Trans. Computers 58(1): 69-81 (2009)

Mircea R. Stan, Dincer Unluer, Avik Ghosh, Frank S. C. Tseng: Graphene Devices, Interconnect and Circuits - Challenges and Opportunities. ISCAS 2009: 69-72

Wei Huang, Kevin Skadron, Sudhanva Gurumurthi, Robert J. Ribando, Mircea R. Stan: Differentiating the roles of IR measurement and simulation for power and temperature-aware design. ISPASS 2009: 1-10

Adam C. Cabe, Zhenyu Qi, Stuart N. Wooters, Travis N. Blalock, Mircea R. Stan: Small embeddable NBTI sensors (SENS) for tracking on-chip performance decay. ISQED 2009: 1-6

Wei Huang, Karthik Sankaranarayanan, Kevin Skadron, Robert J. Ribando, Mircea R. Stan: Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model. IEEE Trans. Computers 57(9): 1277-1288 (2008)

Wei Huang, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Ribando, Kevin Skadron: Many-core design from a thermal perspective. DAC 2008: 746-749

Zhenyu Qi, Mircea R. Stan: NBTI resilient circuits using adaptive body biasing. ACM Great Lakes Symposium on VLSI 2008: 285-290

Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan: Intra-disk Parallelism: An Idea Whose Time Has Come. ISCA 2008: 303-314

Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan: Sensitivity Based Power Management of Enterprise Storage Systems. MASCOTS 2008: 93-102

Garrett S. Rose, Yuxing Yao, James M. Tour, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, John C. Bean, Lloyd R. Harriott, Mircea R. Stan: Designing CMOS/molecular memories while considering device parameter variations. JETC 3(1) (2007)

Zhijian Lu, Wei Huang, Mircea R. Stan, Kevin Skadron, John Lach: Interconnect Lifetime Prediction for Reliability-Aware Systems. IEEE Trans. VLSI Syst. 15(2): 159-172 (2007)

Yan Zhang, Sudhanva Gurumurthi, Mircea R. Stan: SODA: Sensitivity Based Optimization of Disk Architecture. DAC 2007: 865-870

Yan Zhang, Mircea R. Stan: Temperature-aware circuit design using adaptive body biasing. ACM Great Lakes Symposium on VLSI 2007: 84-89

Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kosonocky, Zhenyu Qi, Mircea R. Stan: Structured and tuned array generation (STAG) for high-performance random logic. ACM Great Lakes Symposium on VLSI 2007: 257-262

Zhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan: Multi-Dimensional Circuit and Micro-Architecture Level Optimization. ISQED 2007: 275-280

Wei Huang, Shougata Ghosh, Sivakumar Velusamy, Karthik Sankaranarayanan, Kevin Skadron, Mircea R. Stan: HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design. IEEE Trans. VLSI Syst. 14(5): 501-513 (2006)

Zhijian Lu, Yan Zhang, Mircea R. Stan, John Lach, Kevin Skadron: Procrastinating voltage scheduling with discrete frequency sets. DATE 2006: 456-461

Garrett S. Rose, Mircea R. Stan: A programmable majority logic array using molecular scale electronics. FPGA 2006: 225

Garrett S. Rose, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, Mircea R. Stan, John C. Bean, Lloyd R. Harriott, Yuxing Yao, James M. Tour: Design approaches for hybrid CMOS/molecular memory based on experimental device data. ACM Great Lakes Symposium on VLSI 2006: 2-7

Zhenyu Qi, Wei Huang, Adam C. Cabe, Wenqian Wu, Yan Zhang, Garrett S. Rose, Mircea R. Stan: A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors. SoCC 2006: 111-112

Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler: Hybrid CMOS/Molecular Electronic Circuits. VLSI Design 2006: 703-708

Wolfgang Nebel, Mircea R. Stan, Anand Raghunathan, Jörg Henkel, Diana Marculescu (Eds.): Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006. ACM 2006, isbn 1-59593-462-6

Karthik Sankaranarayanan, Sivakumar Velusamy, Mircea R. Stan, Kevin Skadron: A Case for Thermal-Aware Floorplanning at the Microarchitectural Level. J. Instruction-Level Parallelism 7 (2005)

Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Improved Thermal Management with Reliability Banking. IEEE Micro 25(6): 40-49 (2005)

Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, Mircea R. Stan: Optimal procrastinating voltage scheduling for hard real-time systems. DAC 2005: 905-908

Sivakumar Velusamy, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Monitoring Temperature in FPGA based SoCs. ICCD 2005: 634-640

Yan Zhang, Travis N. Blalock, Mircea R. Stan: A three-level toggle-avoid bus signaling scheme. ISCAS (2) 2005: 1843-1846

Wei Huang, Eric Humenay, Kevin Skadron, Mircea R. Stan: The need for a full-chip and package thermal model for thermally optimized IC designs. ISLPED 2005: 245-250

Kevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Wei Huang, Sivakumar Velusamy, David Tarjan: Temperature-aware microarchitecture: Modeling and implementation. TACO 1(1): 94-125 (2004)

Dharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea R. Stan: Power-Aware Branch Prediction: Characterization and Design. IEEE Trans. Computers 53(2): 168-186 (2004)

Garrett S. Rose, Matthew M. Ziegler, Mircea R. Stan: Large-signal two-terminal device model for nanoelectronic circuit analysis. IEEE Trans. VLSI Syst. 12(11): 1201-1208 (2004)

Lei He, Weiping Liao, Mircea R. Stan: System level leakage reduction considering the interdependence of temperature and leakage. DAC 2004: 12-17

Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy: Compact thermal modeling for temperature-aware design. DAC 2004: 878-883

Yingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea R. Stan, Kevin Skadron: State-Preserving vs. Non-State-Preserving Leakage Control in Caches. DATE 2004: 22-29

Matthew M. Ziegler, Mircea R. Stan: A Unified Design Space for Regular Parallel Prefix Adders. DATE 2004: 1386-1387

Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron: Interconnect lifetime prediction under dynamic stress for reliability-aware design. ICCAD 2004: 327-334

Mircea R. Stan: Systolic counters with unique zero state. ISCAS (2) 2004: 909-912

Mircea R. Stan, Yan Zhang: Perfect 3-Limited-Weight Code for Low Power I/O. PATMOS 2004: 79-89

Mircea R. Stan, Fatih Hamzaoglu, David Garrett: Non-Manhattan maze routing. SBCCI 2004: 260-265

Mircea R. Stan, Kevin Skadron: Guest Editors' Introduction: Power-Aware Computing. IEEE Computer 36(12): 35-38 (2003)

Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Alloyed Branch History: Combining Global and Local Branch History for Robust Performance. International Journal of Parallel Programming 31(2): 137-177 (2003)

Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan: Temperature-Aware Computer Systems: Opportunities and Challenges. IEEE Micro 23(6): 52-61 (2003)

Mircea R. Stan, Kevin Skadron, Marco Barcella, Wei Huang, Karthik Sankaranarayanan, Sivakumar Velusamy: HotSpot: a dynamic compact thermal model at the processor-architecture level. Microelectronics Journal 34(12): 1153-1165 (2003)

Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron: Reducing Multimedia Decode Power using Feedback Control. ICCD 2003: 489-

Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan: Temperature-Aware Microarchitecture. ISCA 2003: 2-13

Mircea R. Stan, Marco Barcella: MTCMOS with outer feedback (MTOF) flip-flops. ISCAS (5) 2003: 429-432

Matthew M. Ziegler, Mircea R. Stan: The CMOS/nano interface from a circuits perspective. ISCAS (4) 2003: 904-907

Mircea R. Stan: CMOS Circuits with Subvolt Supply Voltages. IEEE Design & Test of Computers 19(2): 34-43 (2002)

Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De: Analysis of dual-V_T SRAM cells with full-swing single-ended bit line sensing for on-chip cache. IEEE Trans. VLSI Syst. 10(2): 91-95 (2002)

Zhijian Lu, Jason Hein, Marty Humphrey, Mircea R. Stan, John Lach, Kevin Skadron: Control-theoretic dynamic frequency and voltage scaling for multimedia workloads. CASES 2002: 156-163

Mircea R. Stan, Avishek Panigrahi: The Selective Pull-Up (SP) Noise Immunity Scheme for Dynamic Circuits. DATE 2002: 1106

Kevin Skadron, Tarek F. Abdelzaher, Mircea R. Stan: Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. HPCA 2002: 17-28

Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan: Power Issues Related to Branch Prediction. HPCA 2002: 233-244

Matthew M. Ziegler, Mircea R. Stan: A Case for CMOS/nano co-design. ICCAD 2002: 348-352

Fatih Hamzaoglu, Mircea R. Stan: Circuit-level techniques to control gate leakage for sub-100nm CMOS. ISLPED 2002: 60-63

Yan Zhang, John Lach, Kevin Skadron, Mircea R. Stan: Odd/even bus invert with two-phase transfer for buses with coupling. ISLPED 2002: 80-83

Mircea R. Stan: Low-power CMOS with subvolt supply voltages. IEEE Trans. VLSI Syst. 9(2): 394-400 (2001)

David Garrett, Mircea R. Stan: A 2.5 Mb/s, 23 mW SOVA traceback chip for turbo decoding applications. ISCAS (4) 2001: 61-64

Joshua L. Garrett, Mircea R. Stan: Active threshold compensation circuit for improved performance in cooled CMOS systems. ISCAS (4) 2001: 410-413

David Garrett, Mircea R. Stan, Alvar Dean: Challenges in clockgating for a low power ASIC methodology. ISLPED 1999: 176-181

Mircea R. Stan: Optimal Voltages and Sizing for Low Power. VLSI Design 1999: 428-433

Mircea R. Stan, Alexandre F. Tenca, Milos D. Ercegovac: Long and Fast Up/Down Counters. IEEE Trans. Computers 47(7): 722-735 (1998)

Mircea R. Stan: Low threshold CMOS circuits with low standby current. ISLPED 1998: 97-99

David Garrett, Mircea R. Stan: Low power architecture of the soft-output Viterbi algorithm. ISLPED 1998: 262-267

Mircea R. Stan, Wayne P. Burleson: Low-power encodings for global communication in CMOS VLSI. IEEE Trans. VLSI Syst. 5(4): 444-455 (1997)

Mircea R. Stan: Synchronous Up/Down Counter with Clock Period Independent of Counter Size. IEEE Symposium on Computer Arithmetic 1997: 274-281

David Garrett, Mircea R. Stan: Power reduction techniques for a spread spectrum based correlator. ISLPED 1997: 225-230

Mircea R. Stan, Wayne P. Burleson: Two dimensional codes for low power. ISLPED 1996: 335-340

Mircea R. Stan, Wayne P. Burleson: Bus-invert coding for low-power I/O. IEEE Trans. VLSI Syst. 3(1): 49-58 (1995)

Mircea R. Stan, Wayne P. Burleson: Coding a terminated bus for low power. Great Lakes Symposium on VLSI 1995: 70-73

Mircea R. Stan, Wayne P. Burleson, Christopher I. Connolly, Roderic A. Grupen: Analog VLSI for robot path planning. VLSI Signal Processing 8(1): 61-73 (1994)