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Jared Stark
2000 – 2009
- 2006
[j7]Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark: Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. IEEE Micro 26(1): 48-58 (2006)- 2005
- [j6]Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt: On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. Computer Architecture Letters 4(1): 2 (2005)
- [j5]
- [j4]Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero: Better Branch Prediction Through Prophet/Critic Hybrids. IEEE Micro 25(1): 80-89 (2005)
- [c11]Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt: Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. MICRO 2005: 43-54
- 2004
- [c10]Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero: Prophet/Critic Hybrid Branch Prediction. ISCA 2004: 250-263
- 2003
- [j3]Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt: Runahead Execution: An Effective Alternative to Large Instruction Windows. IEEE Micro 23(6): 20-25 (2003)
- [c9]Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt: Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors. HPCA 2003: 129-140
- [c8]Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark: Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. ISCA 2003: 314-323
- 2002
- [c7]Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai: Bloom filtering cache misses for accurate data speculation and prefetching. ICS 2002: 189-198
- 2001
- [c6]Mary D. Brown, Jared Stark, Yale N. Patt: Select-free instruction scheduling logic. MICRO 2001: 204-213
- 2000
- [c5]Jared Stark, Mary D. Brown, Yale N. Patt: On pipelining dynamic instruction scheduling logic. MICRO 2000: 57-66
1990 – 1999
- 1999
- [c4]Robert S. Chappell, Jared Stark, Sangwook P. Kim, Steven K. Reinhardt, Yale N. Patt: Simultaneous Subordinate Microthreading (SSMT). ISCA 1999: 186-195
- 1998
- [c3]Jared Stark, Marius Evers, Yale N. Patt: Variable Length Path Branch Prediction. ASPLOS 1998: 170-179
- 1997
- [j2]Yale N. Patt, Sanjay J. Patel, Marius Evers, Daniel H. Friendly, Jared Stark: One Billion Transistors, One Uniprocessor, One Chip. IEEE Computer 30(9): 51-57 (1997)
- [j1]Stéphan Jourdan, Jared Stark, Tse-Hao Hsing, Yale N. Patt: Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution. International Journal of Parallel Programming 25(5): 363-383 (1997)
- [c2]Jared Stark, Paul Racunas, Yale N. Patt: Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order. MICRO 1997: 34-43
- 1996
- [c1]Stéphan Jourdan, Tse-Hao Hsing, Jared Stark, Yale N. Patt: The effects of mispredicted-path execution on branch prediction structures. IEEE PACT 1996: 58-67
Coauthor Index
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last updated on 2012-12-22 19:52 CET by the dblp team