Michele Stucchi

Michele Stucchi, Dimitrios Velenis, Guruprasad Katti: Capacitance Measurements of Two-Dimensional and Three-Dimensional IC Interconnect Structures by Quasi-Static $C$-$V$ Technique. IEEE T. Instrumentation and Measurement 61(7): 1979-1990 (2012)

Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal: Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. J. Solid-State Circuits 46(1): 293-307 (2011)

Herman Oprins, A. Srinivasan, Miroslav Cupák, Vladimir Cherman, Cristina Torregiani, Michele Stucchi, Geert Van der Plas, Paul Marchal, Bart Vandevelde, E. Cheng: Fine grain thermal modeling and experimental validation of 3D-ICs. Microelectronics Journal 42(4): 572-578 (2011)

Geert Van der Plas, Steven Thijs, Dimitri Linten, Guruprasad Katti, Paresh Limaye, Abdelkarim Mercha, Michele Stucchi, Herman Oprins, Bart Vandevelde, Nikolaos Minas, Miro Cupac, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal: Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. CICC 2010: 1-4

Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal: 3D integration: Circuit design, test, and reliability challenges. IOLTS 2010: 217

Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne: Design issues and considerations for low-cost 3D TSV IC technology. ISSCC 2010: 148-149

Jan Van Olmen, Jan Coenen, Wim Dehaene, Kristin De Meyer, Cedric Huyghebaert, Anne Jourdain, Guruprasad Katti, Abdelkarim Mercha, Michal Rakowski, Michele Stucchi, Youssef Travaly, Eric Beyne, Bart Swinnen: 3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV). 3DIC 2009: 1-5

Dimitrios Velenis, Michele Stucchi, Erik Jan Marinissen, Bart Swinnen, Eric Beyne: Impact of 3D design choices on manufacturing cost. 3DIC 2009: 1-5

Jin Guo, Antonis Papanikolaou, Michele Stucchi, Kristof Croes, Zsolt Tokei, Francky Catthoor: A tool flow for predicting system level timing failures due to interconnect reliability degradation. ACM Great Lakes Symposium on VLSI 2008: 291-296

Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene: Statistically Aware SRAM Memory Array Design. ISQED 2006: 25-30

Mandeep Bamal, Youssef Travaly, Wenqi Zhang, Michele Stucchi, Karen Maex: Impact of interconnect resistance increase on system performance of low power and high performance designs. SLIP 2006: 85-90

Mandeep Bamal, Evelyn Grossar, Michele Stucchi, Karen Maex: Interconnect width selection for deep submicron designs using the table lookup method. SLIP 2004: 41-44

Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Global interconnect trade-off for technology over memory modules to application level: case study. SLIP 2003: 125-132

Michele Stucchi, Karen Maex: Frequency dependence in interline capacitance measurements. IEEE T. Instrumentation and Measurement 51(3): 537-543 (2002)

Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe: Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate. DATE 2002: 1113

Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Interconnect exploration for future wire dominated technologies. SLIP 2002: 105-106