Mohammad Tehranipoor

Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor: Efficient Pattern Generation for Small-Delay Defects Using Selection of Critical Faults. J. Electronic Testing 29(1): 35-48 (2013)

Junxia Ma, Mohammad Tehranipoor, Patrick Girard: A Layout-Aware Pattern Grading Procedure for Critical Paths Considering Power Supply Noise and Crosstalk. J. Electronic Testing 28(2): 201-214 (2012)

Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty: Ensuring Power-Safe Application of Test Patterns Using an Effective Gating Approach Considering Current Limits. J. Low Power Electronics 8(2): 235-247 (2012)

Hassan Salmani, Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty, Patrick Girard, Xiaoqing Wen: Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns. J. Low Power Electronics 8(2): 248-258 (2012)

Hassan Salmani, Mohammad Tehranipoor: Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection. IEEE Transactions on Information Forensics and Security 7(1): 76-87 (2012)

Hassan Salmani, Mohammad Tehranipoor, Jim Plusquellic: A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time. IEEE Trans. VLSI Syst. 20(1): 112-125 (2012)

Xiaoxiao Wang, Mohammad Tehranipoor, Saji George, Dat Tran, LeRoy Winemberg: Design and Analysis of a Delay Sensor Applicable to Process/Environmental Variations and Aging Measurements. IEEE Trans. VLSI Syst. 20(8): 1405-1418 (2012)

Wei Zhao, Mohammad Tehranipoor: PowerMAX: Fast Power Analysis during Test. ATS 2012: 227-232

Xuehui Zhang, Nicholas Tuzzio, Mohammad Tehranipoor: Identification of recovered ICs using fingerprints from a light-weight on-chip sensor. DAC 2012: 703-708

Min Li, Azadeh Davoodi, Mohammad Tehranipoor: A sensor-assisted self-authentication framework for hardware trojan detection. DATE 2012: 1331-1336

Xuehui Zhang, Kan Xiao, Mohammad Tehranipoor: Path-delay fingerprinting for identification of recovered ICs. DFT 2012: 13-18

Jifeng Chen, Shuo Wang, Mohammad Tehranipoor: Efficient selection and analysis of critical-reliability paths and gates. ACM Great Lakes Symposium on VLSI 2012: 45-50

Nicholas Tuzzio, Kan Xiao, Xuehui Zhang, Mohammad Tehranipoor: A zero-overhead IC identification technique using clock sweeping and path delay analysis. ACM Great Lakes Symposium on VLSI 2012: 95-98

Shuo Wang, Mohammad Tehranipoor: TSUNAMI: a light-weight on-chip structure for measuring timing uncertainty induced by noise during functional and test operations. ACM Great Lakes Symposium on VLSI 2012: 183-188

Andrew Ferraiuolo, Xuehui Zhang, Mohammad Tehranipoor: Experimental analysis of a ring oscillator network for hardware Trojan detection in a 90nm ASIC. ICCAD 2012: 37-42

Shuo Wang, Jifeng Chen, Mohammad Tehranipoor: Representative Critical Reliability Paths for low-cost and accurate on-chip aging evaluation. ICCAD 2012: 736-741

Xiaoxiao Wang, Dat Tran, Saji George, LeRoy Winemberg, Nisar Ahmed, Steve Palosh, Allan Dobin, Mohammad Tehranipoor: Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements. ITC 2012: 1-9

Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang: On pinpoint capture power management in at-speed scan test generation. ITC 2012: 1-10

Wei Zhao, Sreejit Chakravarty, Junxia Ma, Narendra Devta-Prasanna, Fan Yang, Mohammad Tehranipoor: A novel method for fast identification of peak current during test. VTS 2012: 191-196

Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty: Test and Diagnosis for Small-Delay Defects. Springer 2011, isbn 978-1-4419-8296-4, pp. I-XVIII, 1-212

Mohammad Tehranipoor, Hassan Salmani, Xuehui Zhang, Michel Wang, Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld: Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges. IEEE Computer 44(7): 66-74 (2011)

Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty: A Metric to Target Small-Delay Defects in Industrial Circuits. IEEE Design & Test of Computers 28(2): 52-61 (2011)

Junxia Ma, Mohammad Tehranipoor: Layout-Aware Critical Path Delay Test Under Maximum Power Supply Noise Effects. IEEE Trans. on CAD of Integrated Circuits and Systems 30(12): 1923-1934 (2011)

Charles Lamech, Reza M. Rad, Mohammad Tehranipoor, Jim Plusquellic: An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities. IEEE Transactions on Information Forensics and Security 6(3-2): 1170-1179 (2011)

Fang Bao, Ke Peng, Krishnendu Chakrabarty, Mohammad Tehranipoor: On Generation of 1-Detect TDF Pattern Set with Significantly Increased SDD Coverage. Asian Test Symposium 2011: 120-125

Shuo Wang, Mohammad Tehranipoor, LeRoy Winemberg: In-field aging measurement and calibration for power-performance optimization. DAC 2011: 706-711

Xuehui Zhang, Mohammad Tehranipoor: RON: An on-chip ring oscillator network for hardware Trojan detection. DATE 2011: 1638-1643

Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor: Critical Fault-Based Pattern Generation for Screening SDDs. European Test Symposium 2011: 177-182

Wei Zhao, Mohammad Tehranipoor: Peak power identification on power bumps during test application. IGCC 2011: 1-3

Xuehui Zhang, Mohammad Tehranipoor: Case study: Detecting hardware Trojans in third-party digital IP cores. HOST 2011: 67-70

Xuehui Zhang, Nicholas Tuzzio, Mohammad Tehranipoor: Red team: Design of intelligent hardware trojans with known defense schemes. ICCD 2011: 309-312

Ke Peng, Fang Bao, Geoff Shofner, LeRoy Winemberg, Mohammad Tehranipoor: Case Study: Efficient SDD test generation for very large integrated circuits. VTS 2011: 78-83

Xiaoqing Wen, Mohammad Tehranipoor, Rohit Kapur, Anand Bhat, Amitava Majumdar, LeRoy Winemberg: Special session 5B: Panel How much toggle activity should we be testing with? VTS 2011: 114

Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty: Power-safe test application using an effective gating approach considering current limits. VTS 2011: 160-165

Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor: Power-aware test generation with guaranteed launch safety for at-speed scan testing. VTS 2011: 166-171

Junxia Ma, Nisar Ahmed, Mohammad Tehranipoor: Low-cost diagnostic pattern generation and evaluation procedures for noise-related failures. VTS 2011: 309-314

LeRoy Winemberg, Mohammad Tehranipoor: Special session: Hot topic: Smart silicon. VTS 2011: 323

Ramesh Karri, Jeyavijayan Rajendran, Kurt Rosenfeld, Mohammad Tehranipoor: Trustworthy Hardware: Identifying and Classifying Hardware Trojans. IEEE Computer 43(10): 39-46 (2010)

Mohammad Tehranipoor, Farinaz Koushanfar: Guest Editors' Introduction: Confronting the Hardware Trustworthiness Problem. IEEE Design & Test of Computers 27(1): 8-9 (2010)

Mohammad Tehranipoor, Farinaz Koushanfar: A Survey of Hardware Trojan Taxonomy and Detection. IEEE Design & Test of Computers 27(1): 10-25 (2010)

Mohammad Tehranipoor, Kenneth M. Butler: Power Supply Noise: A Survey on Effects and Research. IEEE Design & Test of Computers 27(2): 51-67 (2010)

Kohei Miyase, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara, Patrick Girard, Laung-Terng Wang, Mohammad Tehranipoor: High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme. IEICE Transactions 93-D(1): 2-9 (2010)

Nisar Ahmed, Mohammad Tehranipoor: A Novel IR-Drop Tolerant Transition Delay Fault Test Pattern Generation Procedure. J. Low Power Electronics 6(1): 150-159 (2010)

Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Xiaoqing Wen, Nisar Ahmed: A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for Launch-Off-Shift and Launch-Off-Capture Schemes. J. Low Power Electronics 6(2): 359-374 (2010)

Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep Submicrometer Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 29(5): 760-773 (2010)

Reza M. Rad, James F. Plusquellic, Mohammad Tehranipoor: A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions. IEEE Trans. VLSI Syst. 18(12): 1735-1744 (2010)

Ke Peng, Yu Huang, Ruifeng Guo, Wu-Tung Cheng, Mohammad Tehranipoor: Emulating and diagnosing IR-drop by using dynamic SDF. ASP-DAC 2010: 511-516

Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty: Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. Asian Test Symposium 2010: 301-306

Sandeep Kumar Goel, Krishnendu Chakrabarty, Mahmut Yilmaz, Ke Peng, Mohammad Tehranipoor: Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Asian Test Symposium 2010: 307-312

Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: A Noise-Aware Hybrid Method for SDD Pattern Grading and Selection. Asian Test Symposium 2010: 331-336

Xiaoxiao Wang, Mohammad Tehranipoor: Novel Physical Unclonable Function with process and environmental variations. DATE 2010: 1065-1070

Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty: High-quality pattern selection for screening small-delay defects considering process variations and crosstalk. DATE 2010: 1426-1431

Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen: Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes. DDECS 2010: 376-381

Ke Peng, Yu Huang, Pinki Mallick, Wu-Tung Cheng, Mohammad Tehranipoor: Full-circuit SPICE simulation based validation of dynamic delay estimation. European Test Symposium 2010: 101-106

Junxia Ma, Jeremy Lee, Mohammad Tehranipoor, Nisar Ahmed, Patrick Girard: Pattern grading for testing critical paths considering power supply noise and crosstalk using a layout-aware quality metric. ACM Great Lakes Symposium on VLSI 2010: 127-130

Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed: Is test power reduction through X-filling good enough? ITC 2010: 805

Ke Peng, Jason Thibodeau, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: A novel hybrid method for SDD pattern grading and selection. VTS 2010: 45-50

Nisar Ahmed, Mohammad Tehranipoor: A Novel Faster-Than-at-Speed Transition-Delay Test Method Considering IR-Drop Effects. IEEE Trans. on CAD of Integrated Circuits and Systems 28(10): 1573-1582 (2009)

Hassan Salmani, Mohammad Tehranipoor, Jim Plusquellic: New Design Strategy for Improving Hardware Trojan Detection and Reducing Trojan Activation Time. HOST 2009: 66-73

Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta: A novel architecture for on-chip path delay measurement. ITC 2009: 1-10

Junxia Ma, Jeremy Lee, Mohammad Tehranipoor: Layout-Aware Pattern Generation for Maximizing Supply Noise Effects on Critical Paths. VTS 2009: 221-226

Dimitris Gizopoulos, Susumu Horiguchi, Spyros Tragoudas, Mohammad Tehranipoor (Eds.): 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2009, 7-9 October 2009, Chicago, Illinois, USA. IEEE Computer Society 2009

Mohammad Tehranipoor, Jim Plusquellic (Eds.): IEEE International Workshop on Hardware-Oriented Security and Trust, HOST 2009, San Francisco, CA, USA, July 27, 2009. Proceedings. IEEE Computer Society 2009, isbn 978-1-4244-4805-0

Mohammad Tehranipoor, Reza M. Rad: Defect Tolerance for Nanoscale Crossbar-Based Devices. IEEE Design & Test of Computers 25(6): 549-559 (2008)

Reza M. Rad, Mohammad Tehranipoor: SCT: A novel approach for testing and configuring nanoscale devices. JETC 4(3) (2008)

Jeremy Lee, Mohammad Tehranipoor: Layout-Aware Transition-Delay Fault Pattern Generation with Evenly Distributed Switching Activity. J. Low Power Electronics 4(3): 360-371 (2008)

Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed: Low-Transition Test Pattern Generation for BIST-Based Applications. IEEE Trans. Computers 57(3): 303-315 (2008)

Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad Tehranipoor: Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation. DATE 2008: 1172-1177

Xiaoxiao Wang, Hassan Salmani, Mohammad Tehranipoor, James F. Plusquellic: Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis. DFT 2008: 87-95

Reza M. Rad, Jim Plusquellic, Mohammad Tehranipoor: Sensitivity Analysis to Hardware Trojans using Power Supply Transient Signals. HOST 2008: 3-7

Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic: Detecting Malicious Inclusions in Secure Hardware: Challenges and Solutions. HOST 2008: 15-19

Reza M. Rad, Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic: Power supply signal calibration techniques for improving detection resolution to hardware Trojans. ICCAD 2008: 632-639

Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta: Path-RO: a novel on-chip critical path delay measurement under process variations. ICCAD 2008: 640-646

Jeremy Lee, Mohammad Tehranipoor: A Novel Pattern Generation Framework for Inducing Maximum Crosstalk Effects on Delay-Sensitive Paths. ITC 2008: 1-10

Junxia Ma, Jeremy Lee, Mohammad Tehranipoor: Power Distribution Failure Analysis Using Transition-Delay Fault Patterns. ITC 2008: 1

Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects. ITC 2008: 1-10

Jeremy Lee, Mohammad Tehranipoor: LS-TDF: Low-Switching Transition Delay Fault Pattern Generation. VTS 2008: 227-232

Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Test-Pattern Grading and Pattern Selection for Small-Delay Defects. VTS 2008: 233-239

Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor (Eds.): 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA. IEEE Computer Society 2008

Mohammad Tehranipoor, Jim Plusquellic (Eds.): IEEE International Workshop on Hardware-Oriented Security and Trust, HOST 2008, Anaheim, CA, USA, June 9, 2008. Proceedings. IEEE Computer Society 2008

Mohammad Tehranipoor, Kenneth M. Butler: Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs. IEEE Design & Test of Computers 24(3): 214-215 (2007)

Mohammad Tehranipoor: Guest Editorial. J. Electronic Testing 23(2-3): 115-116 (2007)

Reza M. Rad, Mohammad Tehranipoor: Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing. JETC 3(3) (2007)

Nisar Ahmed, Mohammad Tehranipoor, C. P. Ravikumar, Kenneth M. Butler: Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 896-906 (2007)

Mohammad Tehranipoor, Reza M. Rad: Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 943-958 (2007)

Jeremy Lee, Mohammad Tehranipoor, Chintan Patel, Jim Plusquellic: Securing Designs against Scan-Based Side-Channel Attacks. IEEE Trans. Dependable Sec. Comput. 4(4): 325-336 (2007)

Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ravikumar: A critical-path-aware partial gating approach for test power reduction. ACM Trans. Design Autom. Electr. Syst. 12(2) (2007)

Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram: Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design. DAC 2007: 533-538

Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram: Supply Voltage Noise Aware ATPG for Transition Delay Faults. VTS 2007: 179-186

Jim Plusquellic, Dhruva Acharyya, Abhishek Singh, Mohammad Tehranipoor, Chintan Patel: Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method. IEEE Design & Test of Computers 23(4): 278-293 (2006)

Nisar Ahmed, Mohammad Tehranipoor: Improving Transition Delay Test Using a Hybrid Method. IEEE Design & Test of Computers 23(5): 402-412 (2006)

Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram: Timing-based delay test for screening small delay defects. DAC 2006: 320-325

Reza M. Rad, Mohammad Tehranipoor: A new hybrid FPGA with nanoscale clusters and CMOS routing. DAC 2006: 727-730

Reza M. Rad, Mohammad Tehranipoor: A Reconfiguration-based Defect Tolerance Method for Nanoscale Devices. DFT 2006: 107-118

Mohammad Tehranipoor, Reza M. Rad: Fine-grained island style architecture for molecular electronic devices. FPGA 2006: 226

Mohammad Tehranipoor, Reza M. Rad: Test and recovery for fine-grained nanoscale architectures. FPGA 2006: 226

Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram: A novel framework for faster-than-at-speed delay test considering IR-drop effects. ICCAD 2006: 198-203

Jeremy Lee, Mohammad Tehranipoor, Jim Plusquellic: A Low-Cost Solution for Protecting IPs Against Scan-Based Side-Channel Attacks. VTS 2006: 94-99

Kee Sup Kim, Mohammad Tehranipoor: Session Abstract. VTS 2006: 292-293

Reza M. Rad, Mohammad Tehranipoor: SCT: An Approach For Testing and Configuring Nanoscale Devices. VTS 2006: 370-377

Mohammad Tehranipoor, Mehrdad Nourani, Krishnendu Chakrabarty: Nine-coded compression technique for testing embedded cores in SoCs. IEEE Trans. VLSI Syst. 13(6): 719-731 (2005)

Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed: Low Transition LFSR for BIST-Based Applications. Asian Test Symposium 2005: 138-143

Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ravikumar: Partial Gating Optimization for Power Reduction During Test Application. Asian Test Symposium 2005: 242-247

Jeremy Lee, Mohammad Tehranipoor, Chintan Patel, Jim Plusquellic: Securing Scan Design Using Lock and Key Technique. DFT 2005: 51-62

Nisar Ahmed, Mohammad Tehranipoor: Improving Transition Delay Fault Coverage Using Hybrid Scan-Based Technique. DFT 2005: 187-198

Mohammad Tehranipoor: Defect Tolerance for Molecular Electronics-Based NanoFabrics Using Built-In Self-Test Procedure. DFT 2005: 305-313

Nisar Ahmed, Mohammad Tehranipoor, C. P. Ravikumar: Enhanced launch-off-capture transition fault testing. ITC 2005: 10

Nisar Ahmed, C. P. Ravikumar, Mohammad Tehranipoor, Jim Plusquellic: At-Speed Transition Fault Testing With Low Speed Scan Enable. VTS 2005: 42-47

Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed: Pattern Generation and Estimation for Power Supply Noise Analysis. VTS 2005: 439-444